[clocking] Add ScalaTests for the divider-only PLL configurator

This commit is contained in:
David Biancolin
2020-11-02 10:40:39 -08:00
parent f387634a41
commit aa4a44925e

View File

@@ -0,0 +1,21 @@
//See LICENSE for license details.
package chipyard.clocking
import freechips.rocketchip.prci._
class SimplePllConfigurationSpec extends org.scalatest.FlatSpec {
def conf(freqMHz: Iterable[Double]): SimplePllConfiguration = new SimplePllConfiguration("test",
freqMHz.map({ f => ClockSinkParameters(
name = Some(s"desiredFreq_$f"),
take = Some(ClockParameters(f))) }).toSeq)
def tryConf(freqMHz: Double*): Unit = {
val freqStr = freqMHz.mkString(", ")
it should s"configure for ${freqStr} MHz" in { conf(freqMHz) }
}
tryConf(3200.0, 1600.0, 1000.0, 100.0)
tryConf(3200.0, 1600.0)
tryConf(3200.0, 1066.7)
}