Merge pull request #941 from zslwyuan/patch-3

Swap two arguments to resolve bug
2021-08-30 14:59:51 -07:00
parent cf779bbc58 d06abdb419
commit 984a10993e
1 changed files with 2 additions and 2 deletions
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -118,8 +118,8 @@ $(BIT_FILE): $(synth_list_f)
 		-tclargs \
 			-top-module "$(MODEL)" \
 			-F "$(synth_list_f)" \
-			-ip-vivado-tcls "$(shell find '$(build_dir)' -name '*.vivado.tcl')" \
-			-board "$(BOARD)"
+			-board "$(BOARD)" \			
+			-ip-vivado-tcls "$(shell find '$(build_dir)' -name '*.vivado.tcl')"

 .PHONY: bitstream
 bitstream: $(BIT_FILE)