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Remove bus-to-bus crossings

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This commit is contained in:
Jerry Zhao
2023-04-17 18:31:47 -07:00
parent 5f076b184d
commit 9566667767
1 changed files with 0 additions and 6 deletions
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6
generators/chipyard/src/main/scala/config/ChipConfigs.scala
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@@ -34,11 +34,5 @@ class ChipLikeQuadRocketConfig extends Config(
// Create the uncore clock group // Create the uncore clock group
new chipyard.clocking.WithClockGroupsCombinedByName("uncore", "implicit", "sbus", "mbus", "cbus", "system_bus", "fbus", "pbus") ++ new chipyard.clocking.WithClockGroupsCombinedByName("uncore", "implicit", "sbus", "mbus", "cbus", "system_bus", "fbus", "pbus") ++
// Set up the crossings
new chipyard.config.WithFbusToSbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossing between SBUS and FBUS
new chipyard.config.WithCbusToPbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossing between PBUS and CBUS
new chipyard.config.WithSbusToMbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossings between backside of L2 and MBUS
new testchipip.WithAsynchronousSerialSlaveCrossing ++ // Add Async crossing between serial and MBUS. Its master-side is tied to the FBUS
new chipyard.config.AbstractConfig) new chipyard.config.AbstractConfig)