[Firechip] Include reset in tracerv tokens
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@@ -42,10 +42,13 @@ trait HasTraceIOImp extends LazyModuleImp {
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outer.tileTraceNodes.zipWithIndex.foreach({ case (node, idx) =>
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if (p(InstantiateTracerVBridges)) {
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val b = TracerVBridge(node.bundle)
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// Used for verifying the TracerV bridge
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if (p(PrintTracePort)) {
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val traceprint = WireDefault(0.U(512.W))
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traceprint := b.io.traces.asUInt
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printf(s"TRACEPORT ${idx}: %x\n", traceprint)
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withClockAndReset(node.bundle.head.clock, node.bundle.head.reset) {
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val traceprint = WireDefault(0.U(512.W))
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traceprint := b.io.traces.asUInt
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printf(s"TRACEPORT ${idx}: %x\n", traceprint)
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}
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}
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}
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})
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