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Fix typo

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This commit is contained in:
Edward Wang
2017-08-01 12:49:40 -07:00
committed by edwardcwang
parent 00c99f56b1
commit 923a08dfa1
1 changed files with 1 additions and 1 deletions
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2
macros/src/main/scala/MacroCompiler.scala
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@@ -527,7 +527,7 @@ object MacroCompiler extends App {
" -v, --verilog: Verilog output",
" -c, --cost-func: Cost function to use. Optional (default: \"default\")",
" -cp, --cost-param: Cost function parameter. (Optional depending on the cost function.). e.g. -c ExternalMetric -cp path /path/to/my/cost/script",
" --syn-flop: Produces synthesizable flop-based memories (for all memories and library memory macros); likely useful for simulation purposes") mkString "\n"
" --syn-flops: Produces synthesizable flop-based memories (for all memories and library memory macros); likely useful for simulation purposes") mkString "\n"
def parseArgs(map: MacroParamMap, costMap: CostParamMap, synflops: Boolean, args: List[String]): (MacroParamMap, Boolean) =
args match {