Merge pull request #216 from ucb-bar/dev-sha3

Integrate sha3 accelerator

.gitmodules

@@ -55,3 +55,6 @@
 [submodule "tools/treadle"]
 	path = tools/treadle
 	url = https://github.com/freechipsproject/treadle.git
+[submodule "generators/rocc-template"]
+	path = generators/sha3
+	url = https://github.com/ucb-bar/rocc-template.git

build.sbt

@@ -106,7 +106,7 @@ lazy val testchipip = (project in file("generators/testchipip"))
   .settings(commonSettings)
 
 lazy val example = conditionalDependsOn(project in file("generators/example"))
-  .dependsOn(boom, hwacha, sifive_blocks, sifive_cache, utilities)
+  .dependsOn(boom, hwacha, sifive_blocks, sifive_cache, utilities, sha3)
   .settings(commonSettings)
 
 lazy val tracegen = conditionalDependsOn(project in file("generators/tracegen"))
@@ -129,6 +129,10 @@ lazy val boom = (project in file("generators/boom"))
   .dependsOn(rocketchip)
   .settings(commonSettings)
 
+lazy val sha3 = (project in file("generators/sha3"))
+  .dependsOn(rocketchip, `chisel-testers`)
+  .settings(commonSettings)
+
 lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/"))
   .settings(commonSettings)
 

generators/example/src/main/scala/RocketConfigs.scala

@@ -100,3 +100,10 @@ class GB1MemoryRocketConfig extends Config(
   new freechips.rocketchip.subsystem.WithNBigCores(1) ++
   new freechips.rocketchip.system.BaseConfig)
 
+class Sha3RocketConfig extends Config(
+  new sha3.WithSha3Accel ++                                // add SHA3 rocc accelerator
+  new WithTop ++
+  new WithBootROM ++
+  new freechips.rocketchip.subsystem.WithInclusiveCache ++
+  new freechips.rocketchip.subsystem.WithNBigCores(1) ++
+  new freechips.rocketchip.system.BaseConfig)