wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

pass correct verilator root

Browse Source
This commit is contained in:
abejgonzalez
2019-07-09 18:26:37 -07:00
parent 64daa500a0
commit 847a874762
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
.circleci/do-rtl-build.sh
View File

@@ -13,6 +13,9 @@ source $SCRIPT_DIR/defaults.sh
# call clean on exit
trap clean EXIT
cd $LOCAL_CHIPYARD_DIR
./scripts/init-submodules-no-riscv-tools.sh
# set stricthostkeychecking to no (must happen before rsync)
run "echo \"Ping $SERVER\""
@@ -27,9 +30,8 @@ copy $LOCAL_CHIPYARD_DIR/ $SERVER:$REMOTE_CHIPYARD_DIR
copy $LOCAL_VERILATOR_DIR/ $SERVER:$REMOTE_VERILATOR_DIR
# enter the verisim directory and build the specific config on remote server
run "cd $REMOTE_CHIPYARD_DIR && ./scripts/init-submodules-no-riscv-tools.sh"
run "make -C $REMOTE_SIM_DIR clean"
run "export RISCV=\"$REMOTE_RISCV_DIR\"; make -C $REMOTE_SIM_DIR VERILATOR_INSTALL_DIR=$REMOTE_VERILATOR_DIR JAVA_ARGS=\"-Xmx8G -Xss8M\" $@"
run "export RISCV=\"$REMOTE_RISCV_DIR\"; export VERILATOR_ROOT=$REMOTE_VERILATOR_DIR; make -C $REMOTE_SIM_DIR VERILATOR_INSTALL_DIR=$REMOTE_VERILATOR_DIR JAVA_ARGS=\"-Xmx8G -Xss8M\" $@"
run "rm -rf $REMOTE_CHIPYARD_DIR/project"
# copy back the final build