for now just support verilog build of hwacha (no tests run on it)

This commit is contained in:
abejgonzalez
2019-05-13 14:15:05 -07:00
parent a377c520a6
commit 7ba56b58d3
3 changed files with 34 additions and 73 deletions

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@@ -255,7 +255,7 @@ jobs:
- run: - run:
name: Building the hwacha subproject using Verilator name: Building the hwacha subproject using Verilator
command: .circleci/do-rtl-build.sh SUB_PROJECT=example MODEL=TestHarness MODEL_PACKAGE=freechips.rocketchip.system CONFIG=SmallRocketForHwachaCIConfig CONFIG_PACKAGE=example GENERATOR_PACKAGE=hwacha TOP=ExampleRocketSystem command: .circleci/do-rtl-build.sh SUB_PROJECT=hwacha verilog
no_output_timeout: 120m no_output_timeout: 120m
- save_cache: - save_cache:
@@ -375,33 +375,33 @@ jobs:
name: Run rocketchip benchmark tests name: Run rocketchip benchmark tests
command: make run-bmark-tests -C sims/verisim SUB_PROJECT=rocketchip command: make run-bmark-tests -C sims/verisim SUB_PROJECT=rocketchip
hwacha-run-benchmark-tests: # hwacha-run-benchmark-tests:
docker: # docker:
- image: riscvboom/riscvboom-images:0.0.5 # - image: riscvboom/riscvboom-images:0.0.5
environment: # environment:
JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit # JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit
TERM: dumb # TERM: dumb
#
steps: # steps:
# Checkout the code # # Checkout the code
- checkout # - checkout
#
- run: # - run:
name: Create hash of toolchains # name: Create hash of toolchains
command: | # command: |
.circleci/create-hash.sh # .circleci/create-hash.sh
#
- restore_cache: # - restore_cache:
keys: # keys:
- riscv-tools-installed-v1-{{ checksum "../riscv-tools.hash" }} # - riscv-tools-installed-v1-{{ checksum "../riscv-tools.hash" }}
#
- restore_cache: # - restore_cache:
keys: # keys:
- hwacha-{{ .Branch }}-{{ .Revision }} # - hwacha-{{ .Branch }}-{{ .Revision }}
#
- run: # - run:
name: Run hwacha benchmark tests # name: Run hwacha benchmark tests
command: make run-bmark-tests -C sims/verisim SUB_PROJECT=example MODEL=TestHarness MODEL_PACKAGE=freechips.rocketchip.system CONFIG=SmallRocketForHwachaCIConfig CONFIG_PACKAGE=example GENERATOR_PACKAGE=hwacha TOP=ExampleRocketSystem # command: make run-bmark-tests -C sims/verisim SUB_PROJECT=hwacha
# Order and dependencies of jobs to run # Order and dependencies of jobs to run
workflows: workflows:
@@ -465,7 +465,7 @@ workflows:
- install-riscv-toolchain - install-riscv-toolchain
- prepare-rocketchip - prepare-rocketchip
- hwacha-run-benchmark-tests: # - hwacha-run-benchmark-tests:
requires: # requires:
- install-riscv-toolchain # - install-riscv-toolchain
- prepare-hwacha # - prepare-hwacha

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@@ -2,11 +2,10 @@ package example
import chisel3._ import chisel3._
import freechips.rocketchip.config.{Parameters, Config} import freechips.rocketchip.config.{Parameters, Config}
import freechips.rocketchip.subsystem.{SystemBusKey, RocketTilesKey, CacheBlockBytes, WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32} import freechips.rocketchip.subsystem.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
import freechips.rocketchip.diplomacy.{LazyModule, ValName} import freechips.rocketchip.diplomacy.{LazyModule, ValName}
import freechips.rocketchip.devices.tilelink.BootROMParams import freechips.rocketchip.devices.tilelink.BootROMParams
import freechips.rocketchip.tile.{XLen, RocketTileParams} import freechips.rocketchip.tile.{XLen}
import freechips.rocketchip.rocket.{RocketCoreParams, DCacheParams, ICacheParams, MulDivParams}
import testchipip._ import testchipip._
import sifive.blocks.devices.gpio._ import sifive.blocks.devices.gpio._
@@ -169,35 +168,3 @@ class WithGPIOBoomTop extends Config((site, here, up) => {
top top
} }
}) })
// -------------
// Mixins for CI
// -------------
/**
* Class to specify a smaller Rocket core for Hwacha CI
*/
class WithNHwachaSmallCores(n: Int) extends Config((site, here, up) => {
case RocketTilesKey => {
val small = RocketTileParams(
core = RocketCoreParams(mulDiv = Some(MulDivParams(
mulUnroll = 8,
mulEarlyOut = true,
divEarlyOut = true))),
btb = None,
dcache = Some(DCacheParams(
rowBits = site(SystemBusKey).beatBits,
nSets = 32,
nWays = 1,
nTLBEntries = 4,
nMSHRs = 0,
blockBytes = site(CacheBlockBytes))),
icache = Some(ICacheParams(
rowBits = site(SystemBusKey).beatBits,
nSets = 32,
nWays = 1,
nTLBEntries = 4,
blockBytes = site(CacheBlockBytes))))
List.tabulate(n)(i => small.copy(hartId = i))
}
})

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@@ -21,12 +21,6 @@ class HwachaConfig extends Config(
new hwacha.DefaultHwachaConfig ++ new hwacha.DefaultHwachaConfig ++
new DefaultRocketConfig) new DefaultRocketConfig)
class SmallRocketForHwachaCIConfig extends Config(
new WithNBanks(1) ++
new WithNHwachaSmallCores(1) ++
new hwacha.DefaultHwachaConfig ++
new DefaultRocketConfig)
class RoccRocketConfig extends Config( class RoccRocketConfig extends Config(
new WithRoccExample ++ new WithRoccExample ++
new DefaultRocketConfig) new DefaultRocketConfig)