From 7ba56b58d35ec4802bf7cfa7b2293b214c475c52 Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Mon, 13 May 2019 14:15:05 -0700 Subject: [PATCH] for now just support verilog build of hwacha (no tests run on it) --- .circleci/config.yml | 64 +++++++++---------- .../example/src/main/scala/ConfigMixins.scala | 37 +---------- .../example/src/main/scala/Configs.scala | 6 -- 3 files changed, 34 insertions(+), 73 deletions(-) diff --git a/.circleci/config.yml b/.circleci/config.yml index b6273995..dfc39518 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -255,7 +255,7 @@ jobs: - run: name: Building the hwacha subproject using Verilator - command: .circleci/do-rtl-build.sh SUB_PROJECT=example MODEL=TestHarness MODEL_PACKAGE=freechips.rocketchip.system CONFIG=SmallRocketForHwachaCIConfig CONFIG_PACKAGE=example GENERATOR_PACKAGE=hwacha TOP=ExampleRocketSystem + command: .circleci/do-rtl-build.sh SUB_PROJECT=hwacha verilog no_output_timeout: 120m - save_cache: @@ -375,33 +375,33 @@ jobs: name: Run rocketchip benchmark tests command: make run-bmark-tests -C sims/verisim SUB_PROJECT=rocketchip - hwacha-run-benchmark-tests: - docker: - - image: riscvboom/riscvboom-images:0.0.5 - environment: - JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit - TERM: dumb - - steps: - # Checkout the code - - checkout - - - run: - name: Create hash of toolchains - command: | - .circleci/create-hash.sh - - - restore_cache: - keys: - - riscv-tools-installed-v1-{{ checksum "../riscv-tools.hash" }} - - - restore_cache: - keys: - - hwacha-{{ .Branch }}-{{ .Revision }} - - - run: - name: Run hwacha benchmark tests - command: make run-bmark-tests -C sims/verisim SUB_PROJECT=example MODEL=TestHarness MODEL_PACKAGE=freechips.rocketchip.system CONFIG=SmallRocketForHwachaCIConfig CONFIG_PACKAGE=example GENERATOR_PACKAGE=hwacha TOP=ExampleRocketSystem +# hwacha-run-benchmark-tests: +# docker: +# - image: riscvboom/riscvboom-images:0.0.5 +# environment: +# JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit +# TERM: dumb +# +# steps: +# # Checkout the code +# - checkout +# +# - run: +# name: Create hash of toolchains +# command: | +# .circleci/create-hash.sh +# +# - restore_cache: +# keys: +# - riscv-tools-installed-v1-{{ checksum "../riscv-tools.hash" }} +# +# - restore_cache: +# keys: +# - hwacha-{{ .Branch }}-{{ .Revision }} +# +# - run: +# name: Run hwacha benchmark tests +# command: make run-bmark-tests -C sims/verisim SUB_PROJECT=hwacha # Order and dependencies of jobs to run workflows: @@ -465,7 +465,7 @@ workflows: - install-riscv-toolchain - prepare-rocketchip - - hwacha-run-benchmark-tests: - requires: - - install-riscv-toolchain - - prepare-hwacha +# - hwacha-run-benchmark-tests: +# requires: +# - install-riscv-toolchain +# - prepare-hwacha diff --git a/generators/example/src/main/scala/ConfigMixins.scala b/generators/example/src/main/scala/ConfigMixins.scala index 0b168868..5551a66d 100644 --- a/generators/example/src/main/scala/ConfigMixins.scala +++ b/generators/example/src/main/scala/ConfigMixins.scala @@ -2,11 +2,10 @@ package example import chisel3._ import freechips.rocketchip.config.{Parameters, Config} -import freechips.rocketchip.subsystem.{SystemBusKey, RocketTilesKey, CacheBlockBytes, WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32} +import freechips.rocketchip.subsystem.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32} import freechips.rocketchip.diplomacy.{LazyModule, ValName} import freechips.rocketchip.devices.tilelink.BootROMParams -import freechips.rocketchip.tile.{XLen, RocketTileParams} -import freechips.rocketchip.rocket.{RocketCoreParams, DCacheParams, ICacheParams, MulDivParams} +import freechips.rocketchip.tile.{XLen} import testchipip._ import sifive.blocks.devices.gpio._ @@ -169,35 +168,3 @@ class WithGPIOBoomTop extends Config((site, here, up) => { top } }) - -// ------------- -// Mixins for CI -// ------------- - -/** - * Class to specify a smaller Rocket core for Hwacha CI - */ -class WithNHwachaSmallCores(n: Int) extends Config((site, here, up) => { - case RocketTilesKey => { - val small = RocketTileParams( - core = RocketCoreParams(mulDiv = Some(MulDivParams( - mulUnroll = 8, - mulEarlyOut = true, - divEarlyOut = true))), - btb = None, - dcache = Some(DCacheParams( - rowBits = site(SystemBusKey).beatBits, - nSets = 32, - nWays = 1, - nTLBEntries = 4, - nMSHRs = 0, - blockBytes = site(CacheBlockBytes))), - icache = Some(ICacheParams( - rowBits = site(SystemBusKey).beatBits, - nSets = 32, - nWays = 1, - nTLBEntries = 4, - blockBytes = site(CacheBlockBytes)))) - List.tabulate(n)(i => small.copy(hartId = i)) - } -}) diff --git a/generators/example/src/main/scala/Configs.scala b/generators/example/src/main/scala/Configs.scala index 544ac27f..68ca289c 100644 --- a/generators/example/src/main/scala/Configs.scala +++ b/generators/example/src/main/scala/Configs.scala @@ -21,12 +21,6 @@ class HwachaConfig extends Config( new hwacha.DefaultHwachaConfig ++ new DefaultRocketConfig) -class SmallRocketForHwachaCIConfig extends Config( - new WithNBanks(1) ++ - new WithNHwachaSmallCores(1) ++ - new hwacha.DefaultHwachaConfig ++ - new DefaultRocketConfig) - class RoccRocketConfig extends Config( new WithRoccExample ++ new DefaultRocketConfig)