Merge pull request #71 from ucb-bar/rebar_dev_hwacha
[rebar] adding Hwacha
This commit is contained in:
Abraham Gonzalez
3
.gitmodules
vendored
3
.gitmodules
vendored
@@ -28,3 +28,6 @@
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[submodule "generators/sifive-blocks"]
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path = generators/sifive-blocks
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url = git@github.com:sifive/sifive-blocks.git
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[submodule "generators/hwacha"]
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path = generators/hwacha
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url = git@github.com:ucb-bar/hwacha.git
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@@ -46,7 +46,11 @@ def conditionalDependsOn(prj: Project): Project = {
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}
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lazy val example = conditionalDependsOn(project in file("."))
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.dependsOn(boom, sifive_blocks)
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.dependsOn(boom, hwacha, sifive_blocks)
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.settings(commonSettings)
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lazy val hwacha = (project in file ("generators/hwacha"))
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.dependsOn(rebarrocketchip)
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.settings(commonSettings)
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lazy val boom = (project in file("generators/boom"))
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@@ -8,7 +8,7 @@ SHELL=/bin/bash
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#########################################################################################
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lookup_scala_srcs = $(shell find -L $(1)/ -iname "*.scala" 2> /dev/null)
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PACKAGES=rocket-chip testchipip boom
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PACKAGES=rocket-chip testchipip boom hwacha sifive-blocks
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SCALA_SOURCES=$(foreach pkg,$(PACKAGES),$(call lookup_scala_srcs,$(base_dir)/generators/$(pkg)/src/main/scala)) $(call lookup_scala_srcs,$(base_dir)/src/main/scala)
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#########################################################################################
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@@ -41,7 +41,7 @@ CHISEL_ARGS ?=
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$(FIRRTL_FILE) $(ANNO_FILE): $(SCALA_SOURCES) $(sim_dotf)
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mkdir -p $(build_dir)
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cd $(base_dir) && $(SBT) "project $(SBT_PROJECT)" "runMain $(PROJECT).Generator $(CHISEL_ARGS) $(build_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)"
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cd $(base_dir) && $(SBT) "project $(SBT_PROJECT)" "runMain $(GENERATOR_PACKAGE).Generator $(CHISEL_ARGS) $(build_dir) $(MODEL_PACKAGE) $(MODEL) $(CONFIG_PACKAGE) $(CONFIG)"
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#########################################################################################
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# create verilog files rules and variables
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@@ -78,7 +78,7 @@ $(output_dir)/%.run: $(output_dir)/% $(sim)
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$(sim) +max-cycles=$(timeout_cycles) $< && touch $@
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$(output_dir)/%.out: $(output_dir)/% $(sim)
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$(sim) +verbose +max-cycles=$(timeout_cycles) $< 3>&1 1>&2 2>&3 | spike-dasm > $@
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$(sim) +permissive +verbose +max-cycles=$(timeout_cycles) +permissive-off $< 3>&1 1>&2 2>&3 | spike-dasm > $@
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#########################################################################################
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# include build/project specific makefrags made from the generator
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1
generators/hwacha
Submodule
1
generators/hwacha
Submodule
Submodule generators/hwacha added at bc89157b28
@@ -22,8 +22,8 @@ sim_name = verilator
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# vcs simulator types and rules
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#########################################################################################
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sim_prefix = simulator
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sim = $(sim_dir)/$(sim_prefix)-$(PROJECT)-$(CONFIG)
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sim_debug = $(sim_dir)/$(sim_prefix)-$(PROJECT)-$(CONFIG)-debug
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sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
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sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
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.PHONY: default debug
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default: $(sim)
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@@ -78,7 +78,7 @@ $(sim_debug): $(model_mk_debug)
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$(MAKE) VM_PARALLEL_BUILDS=1 -C $(build_dir)/$(long_name).debug -f V$(VLOG_MODEL).mk
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#########################################################################################
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# create a vcs vpd rule
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# create a verisim vpd rule
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#########################################################################################
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$(output_dir)/%.vpd: $(output_dir)/% $(sim_debug)
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rm -f $@.vcd && mkfifo $@.vcd
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@@ -22,8 +22,8 @@ sim_name = vcs
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# vcs simulator types and rules
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#########################################################################################
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sim_prefix = simv
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sim = $(sim_dir)/$(sim_prefix)-$(PROJECT)-$(CONFIG)
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sim_debug = $(sim_dir)/$(sim_prefix)-$(PROJECT)-$(CONFIG)-debug
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sim = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)
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sim_debug = $(sim_dir)/$(sim_prefix)-$(MODEL_PACKAGE)-$(CONFIG)-debug
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.PHONY: default debug
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default: $(sim)
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@@ -17,6 +17,10 @@ class DefaultRocketConfig extends Config(
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new WithNormalRocketTop ++
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new BaseRocketConfig)
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class HwachaConfig extends Config(
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new hwacha.DefaultHwachaConfig ++
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new DefaultRocketConfig)
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class RoccRocketConfig extends Config(
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new WithRoccExample ++
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new DefaultRocketConfig)
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@@ -64,6 +68,10 @@ class DefaultBoomConfig extends Config(
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new WithNormalBoomTop ++
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new BaseBoomConfig)
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class HwachaBoomConfig extends Config(
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new hwacha.DefaultHwachaConfig ++
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new DefaultBoomConfig)
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class RoccBoomConfig extends Config(
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new WithRoccExample ++
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new DefaultBoomConfig)
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110
variables.mk
110
variables.mk
@@ -3,53 +3,88 @@
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#########################################################################################
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#########################################################################################
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# default variables to invoke the generator for a example Rocket system
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# variables to invoke the generator
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# descriptions:
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# PROJECT = the scala package to find the MODEL/Generator in
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# SBT_PROJECT = the SBT project that you should find the classes/packages in
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# MODEL = the top level module of the project in Chisel (normally the harness)
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# VLOG_MODEL = the top level module of the project in Firrtl/Verilog (normally the harness)
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# MODEL_PACKAGE = the scala package to find the MODEL in
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# CONFIG = the configuration class to give the parameters for the project
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# CFG_PROJECT = the scala package to find the CONFIG class
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# SBT_PROJECT = the SBT project that you should find the Generator class in
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# TB = wrapper over the TestHarness needed to simulate in VCS
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# CONFIG_PACKAGE = the scala package to find the CONFIG class
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# GENERATOR_PACKAGE = the scala package to find the Generator class in
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# TB = wrapper over the TestHarness needed to simulate in a verilog simulator
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# TOP = top level module of the project (normally the module instantiated by the harness)
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#
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# project specific:
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# SUB_PROJECT = use the specific subproject default variables
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#########################################################################################
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PROJECT ?= example
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MODEL ?= RocketTestHarness
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VLOG_MODEL ?= TestHarness
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CONFIG ?= DefaultRocketConfig
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CFG_PROJECT ?= $(PROJECT)
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SBT_PROJECT ?= $(PROJECT)
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TB ?= TestDriver
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TOP ?= RocketTop
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# make it so that you only change 1 param to change most or all of them!
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#########################################################################################
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# subproject overrides
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# description:
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# - make it so that you only change 1 param to change most or all of them!
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# - mainly intended for quick developer setup for common flags
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#########################################################################################
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SUB_PROJECT ?= example
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ifeq ($(SUB_PROJECT),example)
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SBT_PROJECT ?= example
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MODEL ?= RocketTestHarness
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VLOG_MODEL ?= TestHarness
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MODEL_PACKAGE ?= $(SBT_PROJECT)
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CONFIG ?= DefaultRocketConfig
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CONFIG_PACKAGE ?= $(SBT_PROJECT)
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GENERATOR_PACKAGE ?= $(SBT_PROJECT)
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TB ?= TestDriver
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TOP ?= RocketTop
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endif
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# for a BOOM based example system
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ifeq ($(SUB_PROJECT),boomexample)
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# for a BOOM based system (provides all necessary params)
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MODEL=BoomTestHarness
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CONFIG=DefaultBoomConfig
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TOP=BoomTop
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SBT_PROJECT ?= example
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MODEL ?= BoomTestHarness
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VLOG_MODEL ?= TestHarness
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MODEL_PACKAGE ?= $(SBT_PROJECT)
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CONFIG ?= DefaultBoomConfig
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CONFIG_PACKAGE ?= $(SBT_PROJECT)
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GENERATOR_PACKAGE ?= $(SBT_PROJECT)
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TB ?= TestDriver
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TOP ?= BoomTop
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endif
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# for BOOM developers
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ifeq ($(SUB_PROJECT),boom)
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# for BOOM developers (only need to provide a CONFIG)
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PROJECT=boom.system
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MODEL=TestHarness
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CFG_PROJECT=boom.system
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SBT_PROJECT=boom
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TOP=ExampleBoomSystem
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SBT_PROJECT ?= boom
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MODEL ?= TestHarness
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VLOG_MODEL ?= TestHarness
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MODEL_PACKAGE ?= boom.system
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CONFIG ?= BoomConfig
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CONFIG_PACKAGE ?= boom.system
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GENERATOR_PACKAGE ?= boom.system
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TB ?= TestDriver
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TOP ?= ExampleBoomSystem
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endif
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# for Rocket-chip developers
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ifeq ($(SUB_PROJECT),rocketchip)
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# for Rocket-chip developers
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PROJECT=freechips.rocketchip.system
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MODEL=TestHarness
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CONFIG=DefaultConfig
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CFG_PROJECT=freechips.rocketchip.system
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SBT_PROJECT=rebarrocketchip
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TOP=ExampleRocketSystem
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SBT_PROJECT ?= rebarrocketchip
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MODEL ?= TestHarness
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VLOG_MODEL ?= TestHarness
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MODEL_PACKAGE ?= freechips.rocketchip.system
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CONFIG ?= DefaultConfig
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CONFIG_PACKAGE ?= freechips.rocketchip.system
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GENERATOR_PACKAGE ?= freechips.rocketchip.system
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TB ?= TestDriver
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TOP ?= ExampleRocketSystem
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endif
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# for Hwacha developers
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ifeq ($(SUB_PROJECT),hwacha)
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SBT_PROJECT ?= hwacha
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MODEL ?= TestHarness
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VLOG_MODEL ?= TestHarness
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MODEL_PACKAGE ?= freechips.rocketchip.system
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CONFIG ?= HwachaConfig
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CONFIG_PACKAGE ?= hwacha
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GENERATOR_PACKAGE ?= hwacha
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TB ?= TestDriver
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TOP ?= ExampleRocketSystem
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endif
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#########################################################################################
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@@ -62,11 +97,14 @@ REBAR_FIRRTL_DIR = $(base_dir)/tools/firrtl
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#########################################################################################
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# names of various files needed to compile and run things
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#########################################################################################
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long_name = $(PROJECT).$(MODEL).$(CONFIG)
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long_name = $(MODEL_PACKAGE).$(MODEL).$(CONFIG)
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# if building from rocketchip, override the long_name to match what they expect
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ifeq ($(SBT_PROJECT),rebarrocketchip)
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long_name=$(PROJECT).$(CONFIG)
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# match the long_name to what the specific generator will output
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ifeq ($(GENERATOR_PACKAGE),freechips.rocketchip.system)
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long_name=$(CONFIG_PACKAGE).$(CONFIG)
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endif
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ifeq ($(GENERATOR_PACKAGE),hwacha)
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long_name=$(MODEL_PACKAGE).$(CONFIG)
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endif
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FIRRTL_FILE ?= $(build_dir)/$(long_name).fir
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@@ -100,7 +138,7 @@ output_dir=$(sim_dir)/output
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#########################################################################################
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# build output directory for compilation
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#########################################################################################
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build_dir=$(sim_dir)/generated-src
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build_dir=$(sim_dir)/generated-src/$(long_name)
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#########################################################################################
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# vsrcs needed to run projects
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