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Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics

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This commit is contained in:
Richard Yan
2024-05-07 14:41:35 -07:00
parent 81847ae775 74c9eef997
commit 724fd91790
2 changed files with 4 additions and 2 deletions
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3
common.mk
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@@ -28,6 +28,7 @@ EXTRA_SIM_CXXFLAGS ?=
EXTRA_SIM_LDFLAGS ?=
EXTRA_SIM_SOURCES ?=
EXTRA_SIM_REQS ?=
EXTRA_SIM_OUT_NAME ?=
ifneq ($(ASPECTS), )
comma = ,
@@ -367,7 +368,7 @@ get_loadarch_flag = +loadarch=$(subst mem.elf,loadarch,$(1))
endif
# get the output path base name for simulation outputs, First arg is the binary
get_sim_out_name = $(output_dir)/$(call get_out_name,$(1))
get_sim_out_name = $(output_dir)/$(call get_out_name,$(1))$(if $(EXTRA_SIM_OUT_NAME),.$(EXTRA_SIM_OUT_NAME),)
# sim flags that are common to run-binary/run-binary-fast/run-binary-debug
get_common_sim_flags = $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(call get_loadmem_flag,$(1)) $(call get_loadarch_flag,$(1))

3
generators/chipyard/src/main/scala/config/RadianceConfigs.scala
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@@ -39,6 +39,7 @@ class RadianceBaseConfig(argsBinFilename: String = "args.bin") extends Config(
new WithExtMemSize(BigInt("80000000", 16)) ++
new WithRadBootROM() ++
new WithRadROMs(0x7FFF0000L, 0x10000, s"sims/${argsBinFilename}") ++
new chipyard.harness.WithCeaseSuccess ++
new chipyard.iobinders.WithCeasePunchThrough ++
new radiance.subsystem.WithRadianceSimParams(true) ++
new WithCacheBlockBytes(64) ++
@@ -48,7 +49,7 @@ class RadianceConfig extends Config(
// important to keep gemmini tile before RadianceCores to ensure radiance tile id is 0-indexed
new radiance.subsystem.WithRadianceGemmini(location = InCluster(0), dim = 8, extMemBase = x"ff000000", spSizeInKB = 16, accSizeInKB = 8) ++
new radiance.subsystem.WithRadianceCores(1, location=InCluster(0), useVxCache = false) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 8) ++
new radiance.subsystem.WithCoalescer(nNewSrcIds = 16) ++
new radiance.subsystem.WithVortexL1Banks(nBanks = 4)++
new radiance.subsystem.WithRadianceCluster(0) ++
new RadianceBaseConfig)