Bump rocket-chip

This commit is contained in:
Jerry Zhao
2023-10-18 00:27:05 -07:00
parent e8aa68c65c
commit 686d9a5f44
2 changed files with 10 additions and 2 deletions

View File

@@ -11,14 +11,22 @@ import boom.lsu.BoomTraceGenTile
class TraceGenSystem(implicit p: Parameters) extends BaseSubsystem
with InstantiatesHierarchicalElements
with HasTileNotificationSinks
with HasTileInputConstants
with HasHierarchicalElementsRootContext
with HasHierarchicalElements
with CanHaveMasterAXI4MemPort {
def coreMonitorBundles = Nil
val tileStatusNodes = totalTiles.values.toSeq.collect {
case t: GroundTestTile => t.statusNode.makeSink()
case t: BoomTraceGenTile => t.statusNode.makeSink()
}
lazy val debugNode = IntSyncXbar() := NullIntSyncSource()
lazy val clintOpt = None
lazy val debugOpt = None
lazy val plicOpt = None
override lazy val module = new TraceGenSystemModuleImp(this)
}