wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

rename OUT_DIR to GEN_COLLATERAL_DIR

Browse Source
This commit is contained in:
joey0320
2023-02-13 13:24:04 -08:00
parent 6cd46d3c73
commit 58a6e72528
7 changed files with 29 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
fpga/Makefile
View File

@@ -94,14 +94,14 @@ SIM_FILE_REQS += \
$(ROCKETCHIP_RSRCS_DIR)/vsrc/EICG_wrapper.v
# copy files but ignore *.h files in *.f (match vcs)
$(sim_files): $(SIM_FILE_REQS) $(OUT_DIR)
rm -rf $(OUT_DIR)/*
cp -f $(SIM_FILE_REQS) $(OUT_DIR)
$(sim_files): $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
rm -rf $(GEN_COLLATERAL_DIR)/*
cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR)
$(foreach file,\
$(SIM_FILE_REQS),\
$(if $(filter %.h,$(file)),\
,\
echo "$(addprefix $(OUT_DIR)/, $(notdir $(file)))" >> $@;))
echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;))
#########################################################################################
# import other necessary rules and variables