BUGGY COMMIT: Shows MFC issue with multiple same bb paths

This commit is contained in:
abejgonzalez
2023-11-01 12:17:03 -07:00
parent def0115fa4
commit 42eb570fd8

View File

@@ -46,10 +46,11 @@ trait HasGCDIO extends BaseModule {
}
// DOC include start: GCD blackbox
class GCDMMIOBlackBox(val w: Int) extends BlackBox(Map("WIDTH" -> IntParam(w))) with HasBlackBoxResource
class GCDMMIOBlackBox(val w: Int) extends BlackBox(Map("WIDTH" -> IntParam(w))) with HasBlackBoxPath
with HasGCDIO
{
addResource("/vsrc/GCDMMIOBlackBox.v")
val chipyardDir = System.getProperty("user.dir")
addPath(s"$chipyardDir/generators/chipyard/src/main/resources/vsrc/GCDMMIOBlackBox.v")
}
// DOC include end: GCD blackbox
@@ -113,20 +114,36 @@ trait GCDModule extends HasRegMap {
Module(new GCDMMIOChiselModule(params.width))
}
val impl1 = if (params.useBlackBox) {
Module(new GCDMMIOBlackBox(params.width))
} else {
Module(new GCDMMIOChiselModule(params.width))
}
impl.io.clock := clock
impl.io.reset := reset.asBool
impl.io.x := x
impl.io.y := y.bits
impl.io.input_valid := y.valid
y.ready := impl.io.input_ready
y.ready := impl.io.input_ready && impl1.io.input_ready
gcd.bits := impl.io.gcd
gcd.valid := impl.io.output_valid
gcd.valid := impl.io.output_valid && impl1.io.output_valid
impl.io.output_ready := gcd.ready
status := Cat(impl.io.input_ready, impl.io.output_valid)
io.gcd_busy := impl.io.busy
status := Cat(impl.io.input_ready, impl.io.output_valid, impl1.io.input_ready, impl1.io.output_valid)
io.gcd_busy := impl.io.busy && impl1.io.busy
impl1.io.clock := clock
impl1.io.reset := reset.asBool
impl1.io.x := x
impl1.io.y := y.bits
impl1.io.input_valid := y.valid
impl1.io.output_ready := gcd.ready
regmap(
0x00 -> Seq(