Add Ibex to CI

2021-09-11 21:04:35 -07:00
parent fb59ab6aca
commit 3df8d4d641
4 changed files with 373 additions and 0 deletions
--- a/.circleci/check-commit.sh
+++ b/.circleci/check-commit.sh
@@ -0,0 +1,152 @@
+#!/bin/bash
+
+# check to see that submodule commits are present on the master branch
+
+# turn echo on and error on earliest command
+set -ex
+
+# get shared variables
+SCRIPT_DIR="$( cd "$( dirname "$0" )" && pwd )"
+source $SCRIPT_DIR/defaults.sh
+
+# enter bhd repo
+cd $LOCAL_CHIPYARD_DIR
+
+# ignore the private vlsi submodules
+git config submodule.vlsi/hammer-cadence-plugins.update none
+git config submodule.vlsi/hammer-mentor-plugins.update none
+git config submodule.vlsi/hammer-synopsys-plugins.update none
+
+# initialize submodules and get the hashes
+git submodule update --init
+status=$(git submodule status)
+
+all_names=()
+
+
+search_submodule() {
+    echo "Running check on submodule $submodule in $dir"
+    hash=$(echo "$status" | grep "$dir.*$submodule " | awk '{print$1}' | grep -o "[[:alnum:]]*")
+    for branch in "${branches[@]}"
+    do
+        echo "Searching for $hash in origin/$branch of $submodule"
+        (git -C $dir/$submodule branch -r --contains "$hash" | grep "origin/$branch") && true # needs init'ed submodules
+        if [ $? -eq 0 ]
+        then
+            all_names+=("$dir/$submodule $hash 0")
+            return
+        fi
+    done
+    all_names+=("$dir/$submodule $hash 1")
+    return
+}
+
+search () {
+    for submodule in "${submodules[@]}"
+    do
+        search_submodule
+    done
+}
+
+submodules=("cva6" "boom" "ibex" "gemmini" "hwacha" "icenet" "nvdla" "rocket-chip" "sha3" "sifive-blocks" "sifive-cache" "testchipip" "riscv-sodor")
+dir="generators"
+if [ "$CIRCLE_BRANCH" == "master" ] || [ "$CIRCLE_BRANCH" == "dev" ]
+then
+    branches=("master")
+else
+    branches=("master" "dev")
+fi
+search
+
+submodules=("riscv-gnu-toolchain" "riscv-isa-sim" "riscv-pk" "riscv-tests")
+dir="toolchains/esp-tools"
+branches=("master")
+search
+
+
+submodules=("riscv-gnu-toolchain" "riscv-isa-sim" "riscv-pk" "riscv-tests")
+dir="toolchains/riscv-tools"
+branches=("master")
+search
+
+# riscv-openocd doesn't use its master branch
+submodules=("riscv-openocd")
+dir="toolchains/riscv-tools"
+branches=("riscv")
+search
+
+submodules=("qemu" "libgloss")
+dir="toolchains"
+branches=("master")
+search
+
+submodules=("coremark" "firemarshal" "nvdla-workload" "spec2017")
+dir="software"
+if [ "$CIRCLE_BRANCH" == "master" ] || [ "$CIRCLE_BRANCH" == "dev" ]
+then
+    branches=("master")
+else
+    branches=("master" "dev")
+fi
+search
+
+submodules=("DRAMSim2" "axe" "barstools" "chisel-testers" "dsptools" "rocket-dsp-utils" "firrtl-interpreter" "torture" "treadle")
+dir="tools"
+if [ "$CIRCLE_BRANCH" == "master" ] || [ "$CIRCLE_BRANCH" == "dev" ]
+then
+    branches=("master")
+else
+    branches=("master" "dev")
+fi
+search
+
+submodules=("dromajo-src")
+dir="tools/dromajo"
+branches=("master")
+search
+
+submodules=("firesim")
+dir="sims"
+if [ "$CIRCLE_BRANCH" == "master" ] || [ "$CIRCLE_BRANCH" == "dev" ]
+then
+    branches=("master")
+else
+    branches=("master" "dev")
+fi
+search
+
+submodules=("hammer")
+dir="vlsi"
+branches=("master")
+search
+
+submodules=("fpga-shells")
+dir="fpga"
+branches=("master")
+search
+
+# turn off verbose printing to make this easier to read
+set +x
+
+# print 0's
+for str in "${all_names[@]}";
+do
+    if [ 0 = $(echo "$str" | awk '{print$3}') ]; then
+        echo "$str"
+    fi
+done
+
+echo ""
+
+# check if there was a non-zero return code and print 1's
+EXIT=0
+for str in "${all_names[@]}";
+do
+    if [ ! 0 = $(echo "$str" | awk '{print$3}') ]; then
+        echo "$str"
+        EXIT=1
+    fi
+done
+
+echo "Done checking all submodules"
+exit $EXIT
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -252,6 +252,13 @@ jobs:
                group-key: "group-cores"
                project-key: "chipyard-sodor"
                timeout: "30m"
+    chipyard-ibex-run-tests:
+        executor: main-env
+        steps:
+            - run-tests:
+                group-key: "group-cores"
+                project-key: "chipyard-ibex"
+                timeout: "30m"
    chipyard-multiclock-rocket-run-tests:
        executor: main-env
        steps:
@@ -455,6 +462,9 @@ workflows:
            - chipyard-sodor-run-tests:
                requires:
                    - prepare-chipyard-cores
+            - chipyard-ibex-run-tests:
+                requires:
+                    - prepare-chipyard-cores
            - chipyard-dmirocket-run-tests:
                requires:
                    - prepare-chipyard-peripherals
--- a/.circleci/defaults.sh
+++ b/.circleci/defaults.sh
@@ -0,0 +1,91 @@
+#!/bin/bash
+
+copy () {
+    rsync -avzp -e 'ssh' --exclude '.git' $1 $2
+}
+
+run () {
+    ssh -o "StrictHostKeyChecking no" -t $SERVER $@
+}
+
+run_script () {
+    ssh -o "StrictHostKeyChecking no" -t $SERVER 'bash -s' < $1 "$2"
+}
+
+clean () {
+    # remove remote work dir
+    run "rm -rf $REMOTE_WORK_DIR"
+}
+
+# make parallelism
+CI_MAKE_NPROC=8
+# chosen based on a 24c system shared with 1 other project
+REMOTE_MAKE_NPROC=4
+
+# verilator version
+VERILATOR_VERSION=v4.034
+
+# remote variables
+REMOTE_PREFIX=$CI_DIR/$CIRCLE_PROJECT_REPONAME-$CIRCLE_BRANCH
+REMOTE_WORK_DIR=$REMOTE_PREFIX-$CIRCLE_SHA1-$CIRCLE_JOB
+REMOTE_RISCV_DIR=$REMOTE_WORK_DIR/riscv-tools-install
+REMOTE_ESP_DIR=$REMOTE_WORK_DIR/esp-tools-install
+REMOTE_CHIPYARD_DIR=$REMOTE_WORK_DIR/chipyard
+REMOTE_SIM_DIR=$REMOTE_CHIPYARD_DIR/sims/verilator
+REMOTE_FIRESIM_DIR=$REMOTE_CHIPYARD_DIR/sims/firesim/sim
+REMOTE_FPGA_DIR=$REMOTE_CHIPYARD_DIR/fpga
+REMOTE_JAVA_OPTS="-Xmx10G -Xss8M"
+# Disable the supershell to greatly improve the readability of SBT output when captured by Circle CI
+REMOTE_SBT_OPTS="-Dsbt.ivy.home=$REMOTE_WORK_DIR/.ivy2 -Dsbt.supershell=false -Dsbt.global.base=$REMOTE_WORK_DIR/.sbt -Dsbt.boot.directory=$REMOTE_WORK_DIR/.sbt/boot"
+REMOTE_VERILATOR_DIR=$REMOTE_PREFIX-$CIRCLE_SHA1-verilator-install
+
+# local variables (aka within the docker container)
+LOCAL_CHECKOUT_DIR=$HOME/project
+LOCAL_RISCV_DIR=$HOME/riscv-tools-install
+LOCAL_ESP_DIR=$HOME/esp-tools-install
+LOCAL_CHIPYARD_DIR=$LOCAL_CHECKOUT_DIR
+LOCAL_SIM_DIR=$LOCAL_CHIPYARD_DIR/sims/verilator
+LOCAL_FIRESIM_DIR=$LOCAL_CHIPYARD_DIR/sims/firesim/sim
+
+# key value store to get the build groups
+declare -A grouping
+grouping["group-cores"]="chipyard-cva6 chipyard-ibex chipyard-rocket chipyard-hetero chipyard-boom chipyard-sodor chipyard-digitaltop chipyard-multiclock-rocket"
+grouping["group-peripherals"]="chipyard-dmirocket chipyard-blkdev chipyard-spiflashread chipyard-spiflashwrite chipyard-mmios chipyard-lbwif"
+grouping["group-accels"]="chipyard-nvdla chipyard-sha3 chipyard-hwacha chipyard-gemmini chipyard-streaming-fir chipyard-streaming-passthrough"
+grouping["group-tracegen"]="tracegen tracegen-boom"
+grouping["group-other"]="icenet testchipip"
+grouping["group-fpga"]="arty vcu118"
+
+# key value store to get the build strings
+declare -A mapping
+mapping["chipyard-rocket"]=""
+mapping["chipyard-dmirocket"]=" CONFIG=dmiRocketConfig"
+mapping["chipyard-lbwif"]=" CONFIG=LBWIFRocketConfig"
+mapping["chipyard-sha3"]=" CONFIG=Sha3RocketConfig"
+mapping["chipyard-digitaltop"]=" TOP=DigitalTop"
+mapping["chipyard-streaming-fir"]=" CONFIG=StreamingFIRRocketConfig"
+mapping["chipyard-streaming-passthrough"]=" CONFIG=StreamingPassthroughRocketConfig"
+mapping["chipyard-hetero"]=" CONFIG=LargeBoomAndRocketConfig"
+mapping["chipyard-boom"]=" CONFIG=SmallBoomConfig"
+mapping["chipyard-blkdev"]=" CONFIG=SimBlockDeviceRocketConfig"
+mapping["chipyard-hwacha"]=" CONFIG=HwachaRocketConfig"
+mapping["chipyard-gemmini"]=" CONFIG=GemminiRocketConfig"
+mapping["chipyard-cva6"]=" CONFIG=CVA6Config"
+mapping["chipyard-ibex"]=" CONFIG=IbexConfig"
+mapping["chipyard-spiflashread"]=" CONFIG=LargeSPIFlashROMRocketConfig"
+mapping["chipyard-spiflashwrite"]=" CONFIG=SmallSPIFlashRocketConfig"
+mapping["chipyard-mmios"]=" CONFIG=MMIORocketConfig verilog"
+mapping["tracegen"]=" CONFIG=NonBlockingTraceGenL2Config"
+mapping["tracegen-boom"]=" CONFIG=BoomTraceGenConfig"
+mapping["chipyard-nvdla"]=" CONFIG=SmallNVDLARocketConfig"
+mapping["chipyard-sodor"]=" CONFIG=Sodor5StageConfig"
+mapping["chipyard-multiclock-rocket"]=" CONFIG=MulticlockRocketConfig"
+
+mapping["firesim"]="SCALA_TEST=firesim.firesim.RocketNICF1Tests"
+mapping["firesim-multiclock"]="SCALA_TEST=firesim.firesim.RocketMulticlockF1Tests"
+mapping["fireboom"]="SCALA_TEST=firesim.firesim.BoomF1Tests"
+mapping["icenet"]="SUB_PROJECT=icenet"
+mapping["testchipip"]="SUB_PROJECT=testchipip"
+
+mapping["arty"]="SUB_PROJECT=arty verilog"
+mapping["vcu118"]="SUB_PROJECT=vcu118 verilog"
--- a/.circleci/run-tests.sh
+++ b/.circleci/run-tests.sh
@@ -0,0 +1,120 @@
+#!/bin/bash
+
+# run the different tests
+
+# turn echo on and error on earliest command
+set -ex
+
+# get remote exec variables
+SCRIPT_DIR="$( cd "$( dirname "$0" )" && pwd )"
+source $SCRIPT_DIR/defaults.sh
+
+run_bmark () {
+    make run-bmark-tests-fast -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $@
+}
+
+run_asm () {
+    make run-asm-tests-fast -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR $@
+}
+
+run_both () {
+    run_bmark $@
+    run_asm $@
+}
+
+run_tracegen () {
+    make tracegen -C $LOCAL_SIM_DIR $@
+}
+
+# TODO BUG: the run-binary command forces a rebuild of the simulator in CI
+#           instead, directly run the simulator binary
+case $1 in
+    chipyard-rocket)
+        run_bmark ${mapping[$1]}
+        ;;
+    chipyard-dmirocket)
+        run_bmark ${mapping[$1]}
+        ;;
+    chipyard-lbwif)
+        run_bmark ${mapping[$1]}
+        ;;
+    chipyard-boom)
+        run_bmark ${mapping[$1]}
+        ;;
+    chipyard-hetero)
+        run_bmark ${mapping[$1]}
+        ;;
+    rocketchip)
+        run_bmark ${mapping[$1]}
+        ;;
+    chipyard-hwacha)
+        export RISCV=$LOCAL_ESP_DIR
+        export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib
+        export PATH=$RISCV/bin:$PATH
+        make run-rv64uv-p-asm-tests -j$CI_MAKE_NPROC -C $LOCAL_SIM_DIR ${mapping[$1]}
+        ;;
+    chipyard-gemmini)
+        export RISCV=$LOCAL_ESP_DIR
+        export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib
+        export PATH=$RISCV/bin:$PATH
+        GEMMINI_SOFTWARE_DIR=$LOCAL_SIM_DIR/../../generators/gemmini/software/gemmini-rocc-tests
+        rm -rf $GEMMINI_SOFTWARE_DIR/riscv-tests
+        cd $LOCAL_SIM_DIR
+        $LOCAL_SIM_DIR/simulator-chipyard-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/aligned-baremetal
+        $LOCAL_SIM_DIR/simulator-chipyard-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/raw_hazard-baremetal
+        $LOCAL_SIM_DIR/simulator-chipyard-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/mvin_mvout-baremetal
+        ;;
+    chipyard-sha3)
+        export RISCV=$LOCAL_ESP_DIR
+        export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib
+        export PATH=$RISCV/bin:$PATH
+        (cd $LOCAL_CHIPYARD_DIR/generators/sha3/software && ./build.sh)
+        $LOCAL_SIM_DIR/simulator-chipyard-Sha3RocketConfig $LOCAL_CHIPYARD_DIR/generators/sha3/software/tests/bare/sha3-rocc.riscv
+        ;;
+    chipyard-streaming-passthrough)
+        make -C $LOCAL_CHIPYARD_DIR/tests
+        $LOCAL_SIM_DIR/simulator-chipyard-StreamingPassthroughRocketConfig $LOCAL_CHIPYARD_DIR/tests/streaming-passthrough.riscv
+        ;;
+    chipyard-streaming-fir)
+        make -C $LOCAL_CHIPYARD_DIR/tests
+        $LOCAL_SIM_DIR/simulator-chipyard-StreamingFIRRocketConfig $LOCAL_CHIPYARD_DIR/tests/streaming-fir.riscv
+        ;;
+    chipyard-spiflashread)
+        make -C $LOCAL_CHIPYARD_DIR/tests
+        make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashread.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary
+        ;;
+    chipyard-spiflashwrite)
+        make -C $LOCAL_CHIPYARD_DIR/tests
+        make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashwrite.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary
+        [[ "`xxd $LOCAL_CHIPYARD_DIR/tests/spiflash.img  | grep 1337\ 00ff\ aa55\ face | wc -l`" == "6" ]] || false
+        ;;
+    tracegen)
+        run_tracegen ${mapping[$1]}
+        ;;
+    tracegen-boom)
+        run_tracegen ${mapping[$1]}
+        ;;
+    chipyard-cva6)
+        make run-binary-fast -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/multiply.riscv
+        ;;
+    chipyard-sodor)
+        run_asm ${mapping[$1]}
+        ;;
+    chipyard-ibex)
+        make run-binary-fast -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/multiply.riscv
+        ;;
+    chipyard-nvdla)
+        make -C $LOCAL_CHIPYARD_DIR/tests
+        make -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/nvdla.riscv run-binary
+        ;;
+    icenet)
+        make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR ${mapping[$1]}
+        ;;
+    testchipip)
+        make run-binary-fast BINARY=none -C $LOCAL_SIM_DIR ${mapping[$1]}
+        ;;
+    *)
+        echo "No set of tests for $1. Did you spell it right?"
+        exit 1
+        ;;
+esac