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[firesim] Update the multiclock test

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This commit is contained in:
David Biancolin
2020-01-09 16:51:27 -08:00
parent bcddd6e0f6
commit 38834a99e1
1 changed files with 4 additions and 1 deletions
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5
generators/firechip/src/test/scala/ScalaTestSuite.scala
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@@ -140,7 +140,10 @@ class RamModelRocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimRoc
class RamModelBoomF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimBoomConfig", "BaseF1Config_MCRams")
// Multiclock tests
class RocketMulticlockF1Tests extends FireSimTestSuite("FireSimNoNIC", "HalfRateUncore_DDR3FRFCFSLLC4MB_FireSimRocketChipQuadCoreConfig", "BaseF1Config")
class RocketMulticlockF1Tests extends FireSimTestSuite(
"FireSimNoNIC",
"HalfRateUncore_DDR3FRFCFSLLC4MB_FireSimRocketChipQuadCoreConfig",
"WithSynthAsserts_BaseF1Config")
abstract class FireSimTraceGenTest(targetConfig: String, platformConfig: String)
extends firesim.TestSuiteCommon with IsFireSimGeneratorLike {