Merge pull request #1183 from ucb-bar/openroad

Hammer Updates: Yosys/OpenROAD/Magic/Netgen, VCS Parallelism, Conformal LEC, ASAP7 SRAM Fixes

CHANGELOG.md

@@ -4,10 +4,11 @@ This changelog follows the format defined here: https://keepachangelog.com/en/1.
 
 ## [1.7.0] - 2022-06-18
 
-FireSim bump for local (on-premises) FPGA and distributed metasimulation support.
+FireSim bump for local (on-premises) FPGA and distributed metasimulation support. Hammer now supports the OpenROAD open-source EDA tools for a fully open-source RTL-to-GDS VLSI flow.
 
 ### Added
 * Add a FireSim config with no mem port (#1172)
+* Hammer OpenROAD plugins: Yosys (syn), OpenROAD (par), Magic (drc), Netgen (lvs) (#1183)
 
 ### Changed
 * Bump FireSim to 1.14.0

vlsi/example-openroad.yml

@@ -0,0 +1,21 @@
+# SRAM Compiler compiler options
+vlsi.core.sram_generator_tool: "sram_compiler"
+# You should specify a location for the SRAM generator in the tech plugin
+vlsi.core.sram_generator_tool_path: []
+vlsi.core.sram_generator_tool_path_meta: "append"
+
+# Tool options. Replace with your tool plugin of choice.
+# Yosys options
+vlsi.core.synthesis_tool: "yosys"
+vlsi.core.synthesis_tool_path: ["hammer/src/hammer-vlsi/synthesis"]
+vlsi.core.synthesis_tool_path_meta: "append"
+# Innovus options
+vlsi.core.par_tool: "openroad"
+vlsi.core.par_tool_path: ["hammer/src/hammer-vlsi/par"]
+vlsi.core.par_tool_path_meta: "append"
+# Magic options
+vlsi.core.drc_tool: "magic"
+vlsi.core.drc_tool_path: ["hammer/src/hammer-vlsi/drc"]
+# Netgen options
+vlsi.core.lvs_tool: "netgen"
+vlsi.core.lvs_tool_path: ["hammer/src/hammer-vlsi/lvs"]

vlsi/example-tools.yml

@@ -33,3 +33,4 @@ vlsi.core.power_tool: "voltus"
 vlsi.core.power_tool_path: ["hammer-cadence-plugins/power"]
 vlsi.core.power_tool_path_meta: "append"
 power.voltus.version: "191_ISR3"
+# NOTE (about VCS+Voltus versions): if using FSDB, the VCS version should be approx 2 years older than the Voltus version for compatibility