- Make transfrorms run in as close to same order as before
- Fix parsing of PadPlacement JSON
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@@ -257,9 +257,10 @@ class IOPadSpec extends FlatSpec with Matchers {
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*/
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it should "create proper IO pads + black box in verilog" in {
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val dir = "test_run_dir/PadsVerilog"
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(new ChiselStage).emitFirrtl(
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(new ChiselStage).emitVerilog(
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new ExampleTopModuleWithBB,
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Array("-td", dir, "-X", "verilog")
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// Array("-td", dir, "-X", "verilog")
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Array("-td", dir)
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)
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checkOutputs(dir)
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}
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