- Make transfrorms run in as close to same order as before
- Fix parsing of PadPlacement JSON
This commit is contained in:
@@ -15,6 +15,7 @@ import scala.collection.mutable
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class AddIOPadsTransform extends Transform with SeqTransformBased with DependencyAPIMigration {
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override def prerequisites: Seq[TransformDependency] = Forms.LowForm
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override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
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override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
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val transformList = new mutable.ArrayBuffer[Transform]
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@@ -1,20 +1,46 @@
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// See LICENSE for license details.
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package barstools.tapeout.transforms.pads
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import barstools.tapeout.transforms._
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import net.jcazevedo.moultingyaml._
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import firrtl._
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import firrtl.ir._
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import barstools.tapeout.transforms._
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/** This is a hack to get around weird problem with yaml parser
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* that without this gives PadPlacement defines additional fields
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*
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*/
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trait HasPadPlacementFields {
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def file: String
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def left: String
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def top: String
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def right: String
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def bottom: String
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def instanceArray: String
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def padLine: String
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def template: String
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}
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case class PadPlacementFields(
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file: String,
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left: String,
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top: String,
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right: String,
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bottom: String,
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instanceArray: String,
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padLine: String,
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template: String
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) extends HasPadPlacementFields
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case class PadPlacement(
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file: String,
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left: String,
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top: String,
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right: String,
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bottom: String,
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instanceArray: String,
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padLine: String,
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template: String) {
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file: String,
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left: String,
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top: String,
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right: String,
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bottom: String,
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instanceArray: String,
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padLine: String,
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template: String
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) extends HasPadPlacementFields {
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require(instanceArray contains "{{signal}}", "Instance Array Template should contain {{signal}}")
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require(instanceArray contains "{{idx}}", "Instance Array Template should contain {{idx}}")
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@@ -33,8 +59,8 @@ case class PadPlacement(
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case Bottom => bottom
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}
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import com.gilt.handlebars.scala.binding.dynamic._
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import com.gilt.handlebars.scala.Handlebars
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import com.gilt.handlebars.scala.binding.dynamic._
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private val instanceArrayTemplate = Handlebars(instanceArray.stripMargin)
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private val padLineTemplate = Handlebars(padLine.stripMargin)
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@@ -52,10 +78,26 @@ case class PadPlacementParams(leftPads: String, rightPads: String, topPads: Stri
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object PadPlacementFile extends DefaultYamlProtocol {
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val exampleResource = "/PadPlacement.yaml"
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implicit val _pad = yamlFormat8(PadPlacement)
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def parse(file: String = ""): PadPlacement = {
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(new YamlFileReader(exampleResource)).parse[PadPlacement](file).head
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implicit val _pad = yamlFormat8(PadPlacementFields)
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def main(args: Array[String]): Unit = {
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println(parse("RealTech/PadPlacement.yaml"))
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}
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def parse(file: String = ""): PadPlacement = {
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val fields = (new YamlFileReader(exampleResource)).parse[PadPlacementFields](file).head
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PadPlacement(
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file = fields.file,
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left = fields.left,
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top = fields.top,
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right = fields.right,
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bottom = fields.bottom,
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instanceArray = fields.instanceArray,
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padLine = fields.padLine,
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template = fields.template
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)
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}
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def generate(
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techDir: String,
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targetDir: String,
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@@ -26,6 +26,7 @@ case class ModuleNameSuffixAnnotation(target: CircuitTarget, suffix: String)
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class AddSuffixToModuleNames extends Transform with DependencyAPIMigration {
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override def prerequisites: Seq[TransformDependency] = Forms.LowForm
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override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
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override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
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def processAnnos(annos: AnnotationSeq): (AnnotationSeq, (String) => String) = {
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@@ -26,6 +26,7 @@ class EnumerateModules(enumerate: (Module) => Unit)
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extends Transform with SeqTransformBased with DependencyAPIMigration {
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override def prerequisites: Seq[TransformDependency] = Forms.LowForm
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override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
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override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
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def transforms: Seq[Transform] = Seq(new EnumerateModulesPass(enumerate))
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@@ -44,6 +44,7 @@ object ResetN extends Pass {
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class ResetInverterTransform extends Transform with DependencyAPIMigration {
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override def prerequisites: Seq[TransformDependency] = Forms.LowForm
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override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
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override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
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override def execute(state: CircuitState): CircuitState = {
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@@ -15,6 +15,7 @@ case class RetimeAnnotation(target: Named) extends SingleTargetAnnotation[Named]
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class RetimeTransform extends Transform with DependencyAPIMigration {
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override def prerequisites: Seq[TransformDependency] = Forms.LowForm
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override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
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override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
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override def execute(state: CircuitState): CircuitState = {
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@@ -54,6 +54,7 @@ case class TechnologyLocationAnnotation(dir: String) extends SingleTargetAnnotat
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class TechnologyLocation extends Transform with DependencyAPIMigration {
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override def prerequisites: Seq[TransformDependency] = Forms.LowForm
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override def optionalPrerequisites: Seq[TransformDependency] = Forms.LowFormOptimized
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override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters
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def execute(state: CircuitState): CircuitState = {
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@@ -257,9 +257,10 @@ class IOPadSpec extends FlatSpec with Matchers {
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*/
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it should "create proper IO pads + black box in verilog" in {
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val dir = "test_run_dir/PadsVerilog"
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(new ChiselStage).emitFirrtl(
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(new ChiselStage).emitVerilog(
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new ExampleTopModuleWithBB,
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Array("-td", dir, "-X", "verilog")
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// Array("-td", dir, "-X", "verilog")
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Array("-td", dir)
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)
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checkOutputs(dir)
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}
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