example ymls

vlsi/example-design.yml

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+# General Hammer Inputs Related to the Design and Build System
+
+# Generate Make include to aid in flow 
+vlsi.core.build_system: make
+vlsi.core.max_threads: 12
+
+# Hammer will auto-generate a CPF for simple power designs; see hammer/src/hammer-vlsi/defaults.yml for more info
+vlsi.inputs.power_spec_mode: "auto"
+vlsi.inputs.power_spec_type: "cpf"
+
+# Specify clock signals
+vlsi.inputs.clocks: [
+  {name: "clock", period: "1ns", uncertainty: "0.1ns"}
+]

vlsi/example-tech.yml

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+# Technology Setup
+vlsi.core.technology: <tech_name>
+vlsi.core.technology_path: ["hammer-<tech_name>-plugin"]
+vlsi.core.technology_path_meta: append
+
+# tech node measured in nm (required because of licensing)
+vlsi.core.node: <N>
+
+# technology files installation directory
+technology.<tech_name>.install_dir: "</path/to/technology/pdk/>"

vlsi/example-tools.yml

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+# SRAM Compiler compiler options
+vlsi.core.sram_generator_tool: "sram_compiler"
+# You should specify a location for the SRAM generator in the tech plugin
+vlsi.core.sram_generator_tool_path: []
+vlsi.core.sram_generator_tool_path_meta: "append"
+
+# Tool options. Replace with your tool plugin of choice.
+# Genus options
+vlsi.core.synthesis_tool: "genus"
+vlsi.core.synthesis_tool_path: ["hammer-cadence-plugins/synthesis"]
+vlsi.core.synthesis_tool_path_meta: "append"
+synthesis.genus.version: "1813"
+# Innovus options
+vlsi.core.par_tool: "innovus"
+vlsi.core.par_tool_path: ["hammer-cadence-plugins/par"]
+vlsi.core.par_tool_path_meta: "append"
+par.innovus.version: "181"
+par.innovus.design_flow_effort: "standard"
+par.inputs.gds_merge: true
+# Calibre options
+vlsi.core.drc_tool: "calibre"
+vlsi.core.drc_tool_path: ["hammer-mentor-plugins/drc"]
+vlsi.core.lvs_tool: "calibre"
+vlsi.core.lvs_tool_path: ["hammer-mentor-plugins/lvs"]