695 lines
27 KiB
Systemverilog
695 lines
27 KiB
Systemverilog
// Generated by CIRCT firtool-1.139.0
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module RenameTable(
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input clock,
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reset,
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input [4:0] io_rs1_0,
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io_rs1_1,
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io_rs2_0,
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io_rs2_1,
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io_rd_0,
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io_rd_1,
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input [5:0] io_newPhys_0,
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io_newPhys_1,
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input io_wen_0,
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io_wen_1,
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output [5:0] io_prs1_0,
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io_prs1_1,
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io_prs2_0,
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io_prs2_1,
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io_oldPrd_0,
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io_oldPrd_1,
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input io_commitWen_0,
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io_commitWen_1,
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input [4:0] io_commitRd_0,
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io_commitRd_1,
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input [5:0] io_commitPhys_0,
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io_commitPhys_1,
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input io_recover,
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output [5:0] io_committedPhys_0,
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io_committedPhys_1,
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io_committedPhys_2,
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io_committedPhys_3,
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io_committedPhys_4,
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io_committedPhys_5,
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io_committedPhys_6,
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io_committedPhys_7,
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io_committedPhys_8,
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io_committedPhys_9,
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io_committedPhys_10,
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io_committedPhys_11,
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io_committedPhys_12,
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io_committedPhys_13,
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io_committedPhys_14,
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io_committedPhys_15,
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io_committedPhys_16,
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io_committedPhys_17,
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io_committedPhys_18,
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io_committedPhys_19,
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io_committedPhys_20,
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io_committedPhys_21,
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io_committedPhys_22,
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io_committedPhys_23,
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io_committedPhys_24,
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io_committedPhys_25,
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io_committedPhys_26,
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io_committedPhys_27,
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io_committedPhys_28,
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io_committedPhys_29,
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io_committedPhys_30,
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io_committedPhys_31
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);
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reg [5:0] speculative_0;
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reg [5:0] speculative_1;
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reg [5:0] speculative_2;
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reg [5:0] speculative_3;
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reg [5:0] speculative_4;
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reg [5:0] speculative_5;
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reg [5:0] speculative_6;
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reg [5:0] speculative_7;
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reg [5:0] speculative_8;
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reg [5:0] speculative_9;
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reg [5:0] speculative_10;
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reg [5:0] speculative_11;
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reg [5:0] speculative_12;
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reg [5:0] speculative_13;
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reg [5:0] speculative_14;
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reg [5:0] speculative_15;
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reg [5:0] speculative_16;
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reg [5:0] speculative_17;
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reg [5:0] speculative_18;
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reg [5:0] speculative_19;
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reg [5:0] speculative_20;
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reg [5:0] speculative_21;
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reg [5:0] speculative_22;
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reg [5:0] speculative_23;
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reg [5:0] speculative_24;
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reg [5:0] speculative_25;
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reg [5:0] speculative_26;
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reg [5:0] speculative_27;
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reg [5:0] speculative_28;
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reg [5:0] speculative_29;
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reg [5:0] speculative_30;
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reg [5:0] speculative_31;
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reg [5:0] committed_0;
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reg [5:0] committed_1;
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reg [5:0] committed_2;
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reg [5:0] committed_3;
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reg [5:0] committed_4;
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reg [5:0] committed_5;
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reg [5:0] committed_6;
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reg [5:0] committed_7;
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reg [5:0] committed_8;
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reg [5:0] committed_9;
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reg [5:0] committed_10;
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reg [5:0] committed_11;
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reg [5:0] committed_12;
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reg [5:0] committed_13;
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reg [5:0] committed_14;
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reg [5:0] committed_15;
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reg [5:0] committed_16;
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reg [5:0] committed_17;
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reg [5:0] committed_18;
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reg [5:0] committed_19;
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reg [5:0] committed_20;
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reg [5:0] committed_21;
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reg [5:0] committed_22;
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reg [5:0] committed_23;
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reg [5:0] committed_24;
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reg [5:0] committed_25;
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reg [5:0] committed_26;
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reg [5:0] committed_27;
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reg [5:0] committed_28;
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reg [5:0] committed_29;
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reg [5:0] committed_30;
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reg [5:0] committed_31;
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wire _GEN = io_commitWen_0 & (|io_commitRd_0);
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wire _GEN_0 = _GEN & ~(|io_commitRd_0);
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wire _GEN_1 = _GEN & io_commitRd_0 == 5'h1;
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wire _GEN_2 = _GEN & io_commitRd_0 == 5'h2;
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wire _GEN_3 = _GEN & io_commitRd_0 == 5'h3;
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wire _GEN_4 = _GEN & io_commitRd_0 == 5'h4;
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wire _GEN_5 = _GEN & io_commitRd_0 == 5'h5;
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wire _GEN_6 = _GEN & io_commitRd_0 == 5'h6;
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wire _GEN_7 = _GEN & io_commitRd_0 == 5'h7;
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wire _GEN_8 = _GEN & io_commitRd_0 == 5'h8;
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wire _GEN_9 = _GEN & io_commitRd_0 == 5'h9;
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wire _GEN_10 = _GEN & io_commitRd_0 == 5'hA;
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wire _GEN_11 = _GEN & io_commitRd_0 == 5'hB;
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wire _GEN_12 = _GEN & io_commitRd_0 == 5'hC;
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wire _GEN_13 = _GEN & io_commitRd_0 == 5'hD;
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wire _GEN_14 = _GEN & io_commitRd_0 == 5'hE;
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wire _GEN_15 = _GEN & io_commitRd_0 == 5'hF;
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wire _GEN_16 = _GEN & io_commitRd_0 == 5'h10;
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wire _GEN_17 = _GEN & io_commitRd_0 == 5'h11;
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wire _GEN_18 = _GEN & io_commitRd_0 == 5'h12;
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wire _GEN_19 = _GEN & io_commitRd_0 == 5'h13;
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wire _GEN_20 = _GEN & io_commitRd_0 == 5'h14;
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wire _GEN_21 = _GEN & io_commitRd_0 == 5'h15;
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wire _GEN_22 = _GEN & io_commitRd_0 == 5'h16;
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wire _GEN_23 = _GEN & io_commitRd_0 == 5'h17;
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wire _GEN_24 = _GEN & io_commitRd_0 == 5'h18;
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wire _GEN_25 = _GEN & io_commitRd_0 == 5'h19;
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wire _GEN_26 = _GEN & io_commitRd_0 == 5'h1A;
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wire _GEN_27 = _GEN & io_commitRd_0 == 5'h1B;
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wire _GEN_28 = _GEN & io_commitRd_0 == 5'h1C;
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wire _GEN_29 = _GEN & io_commitRd_0 == 5'h1D;
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wire _GEN_30 = _GEN & io_commitRd_0 == 5'h1E;
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wire _GEN_31 = _GEN & (&io_commitRd_0);
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wire _GEN_32 = io_commitWen_1 & (|io_commitRd_1);
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wire _GEN_33 = _GEN_32 & ~(|io_commitRd_1);
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wire [5:0] committedNext_0 =
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_GEN_33 ? io_commitPhys_1 : _GEN_0 ? io_commitPhys_0 : committed_0;
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wire _GEN_34 = _GEN_32 & io_commitRd_1 == 5'h1;
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wire [5:0] committedNext_1 =
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_GEN_34 ? io_commitPhys_1 : _GEN_1 ? io_commitPhys_0 : committed_1;
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wire _GEN_35 = _GEN_32 & io_commitRd_1 == 5'h2;
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wire [5:0] committedNext_2 =
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_GEN_35 ? io_commitPhys_1 : _GEN_2 ? io_commitPhys_0 : committed_2;
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wire _GEN_36 = _GEN_32 & io_commitRd_1 == 5'h3;
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wire [5:0] committedNext_3 =
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_GEN_36 ? io_commitPhys_1 : _GEN_3 ? io_commitPhys_0 : committed_3;
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wire _GEN_37 = _GEN_32 & io_commitRd_1 == 5'h4;
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wire [5:0] committedNext_4 =
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_GEN_37 ? io_commitPhys_1 : _GEN_4 ? io_commitPhys_0 : committed_4;
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wire _GEN_38 = _GEN_32 & io_commitRd_1 == 5'h5;
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wire [5:0] committedNext_5 =
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_GEN_38 ? io_commitPhys_1 : _GEN_5 ? io_commitPhys_0 : committed_5;
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wire _GEN_39 = _GEN_32 & io_commitRd_1 == 5'h6;
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wire [5:0] committedNext_6 =
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_GEN_39 ? io_commitPhys_1 : _GEN_6 ? io_commitPhys_0 : committed_6;
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wire _GEN_40 = _GEN_32 & io_commitRd_1 == 5'h7;
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wire [5:0] committedNext_7 =
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_GEN_40 ? io_commitPhys_1 : _GEN_7 ? io_commitPhys_0 : committed_7;
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wire _GEN_41 = _GEN_32 & io_commitRd_1 == 5'h8;
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wire [5:0] committedNext_8 =
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_GEN_41 ? io_commitPhys_1 : _GEN_8 ? io_commitPhys_0 : committed_8;
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wire _GEN_42 = _GEN_32 & io_commitRd_1 == 5'h9;
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wire [5:0] committedNext_9 =
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_GEN_42 ? io_commitPhys_1 : _GEN_9 ? io_commitPhys_0 : committed_9;
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wire _GEN_43 = _GEN_32 & io_commitRd_1 == 5'hA;
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wire [5:0] committedNext_10 =
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_GEN_43 ? io_commitPhys_1 : _GEN_10 ? io_commitPhys_0 : committed_10;
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wire _GEN_44 = _GEN_32 & io_commitRd_1 == 5'hB;
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wire [5:0] committedNext_11 =
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_GEN_44 ? io_commitPhys_1 : _GEN_11 ? io_commitPhys_0 : committed_11;
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wire _GEN_45 = _GEN_32 & io_commitRd_1 == 5'hC;
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wire [5:0] committedNext_12 =
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_GEN_45 ? io_commitPhys_1 : _GEN_12 ? io_commitPhys_0 : committed_12;
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wire _GEN_46 = _GEN_32 & io_commitRd_1 == 5'hD;
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wire [5:0] committedNext_13 =
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_GEN_46 ? io_commitPhys_1 : _GEN_13 ? io_commitPhys_0 : committed_13;
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wire _GEN_47 = _GEN_32 & io_commitRd_1 == 5'hE;
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wire [5:0] committedNext_14 =
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_GEN_47 ? io_commitPhys_1 : _GEN_14 ? io_commitPhys_0 : committed_14;
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wire _GEN_48 = _GEN_32 & io_commitRd_1 == 5'hF;
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wire [5:0] committedNext_15 =
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_GEN_48 ? io_commitPhys_1 : _GEN_15 ? io_commitPhys_0 : committed_15;
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wire _GEN_49 = _GEN_32 & io_commitRd_1 == 5'h10;
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wire [5:0] committedNext_16 =
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_GEN_49 ? io_commitPhys_1 : _GEN_16 ? io_commitPhys_0 : committed_16;
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wire _GEN_50 = _GEN_32 & io_commitRd_1 == 5'h11;
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wire [5:0] committedNext_17 =
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_GEN_50 ? io_commitPhys_1 : _GEN_17 ? io_commitPhys_0 : committed_17;
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wire _GEN_51 = _GEN_32 & io_commitRd_1 == 5'h12;
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wire [5:0] committedNext_18 =
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_GEN_51 ? io_commitPhys_1 : _GEN_18 ? io_commitPhys_0 : committed_18;
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wire _GEN_52 = _GEN_32 & io_commitRd_1 == 5'h13;
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wire [5:0] committedNext_19 =
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_GEN_52 ? io_commitPhys_1 : _GEN_19 ? io_commitPhys_0 : committed_19;
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wire _GEN_53 = _GEN_32 & io_commitRd_1 == 5'h14;
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wire [5:0] committedNext_20 =
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_GEN_53 ? io_commitPhys_1 : _GEN_20 ? io_commitPhys_0 : committed_20;
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wire _GEN_54 = _GEN_32 & io_commitRd_1 == 5'h15;
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wire [5:0] committedNext_21 =
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_GEN_54 ? io_commitPhys_1 : _GEN_21 ? io_commitPhys_0 : committed_21;
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wire _GEN_55 = _GEN_32 & io_commitRd_1 == 5'h16;
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wire [5:0] committedNext_22 =
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_GEN_55 ? io_commitPhys_1 : _GEN_22 ? io_commitPhys_0 : committed_22;
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wire _GEN_56 = _GEN_32 & io_commitRd_1 == 5'h17;
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wire [5:0] committedNext_23 =
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_GEN_56 ? io_commitPhys_1 : _GEN_23 ? io_commitPhys_0 : committed_23;
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wire _GEN_57 = _GEN_32 & io_commitRd_1 == 5'h18;
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wire [5:0] committedNext_24 =
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_GEN_57 ? io_commitPhys_1 : _GEN_24 ? io_commitPhys_0 : committed_24;
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wire _GEN_58 = _GEN_32 & io_commitRd_1 == 5'h19;
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wire [5:0] committedNext_25 =
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_GEN_58 ? io_commitPhys_1 : _GEN_25 ? io_commitPhys_0 : committed_25;
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wire _GEN_59 = _GEN_32 & io_commitRd_1 == 5'h1A;
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wire [5:0] committedNext_26 =
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_GEN_59 ? io_commitPhys_1 : _GEN_26 ? io_commitPhys_0 : committed_26;
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wire _GEN_60 = _GEN_32 & io_commitRd_1 == 5'h1B;
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wire [5:0] committedNext_27 =
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_GEN_60 ? io_commitPhys_1 : _GEN_27 ? io_commitPhys_0 : committed_27;
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wire _GEN_61 = _GEN_32 & io_commitRd_1 == 5'h1C;
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wire [5:0] committedNext_28 =
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_GEN_61 ? io_commitPhys_1 : _GEN_28 ? io_commitPhys_0 : committed_28;
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wire _GEN_62 = _GEN_32 & io_commitRd_1 == 5'h1D;
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wire [5:0] committedNext_29 =
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_GEN_62 ? io_commitPhys_1 : _GEN_29 ? io_commitPhys_0 : committed_29;
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wire _GEN_63 = _GEN_32 & io_commitRd_1 == 5'h1E;
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wire [5:0] committedNext_30 =
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_GEN_63 ? io_commitPhys_1 : _GEN_30 ? io_commitPhys_0 : committed_30;
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wire _GEN_64 = _GEN_32 & (&io_commitRd_1);
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wire [5:0] committedNext_31 =
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_GEN_64 ? io_commitPhys_1 : _GEN_31 ? io_commitPhys_0 : committed_31;
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wire [31:0][5:0] _GEN_65 =
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{{speculative_31},
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{speculative_30},
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{speculative_29},
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{speculative_28},
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{speculative_27},
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{speculative_26},
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{speculative_25},
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{speculative_24},
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{speculative_23},
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{speculative_22},
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{speculative_21},
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{speculative_20},
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{speculative_19},
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{speculative_18},
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{speculative_17},
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{speculative_16},
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{speculative_15},
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{speculative_14},
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{speculative_13},
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{speculative_12},
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{speculative_11},
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{speculative_10},
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{speculative_9},
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{speculative_8},
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{speculative_7},
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{speculative_6},
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{speculative_5},
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{speculative_4},
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{speculative_3},
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{speculative_2},
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{speculative_1},
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{speculative_0}};
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wire slot0Writes = io_wen_0 & (|io_rd_0);
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always @(posedge clock) begin
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if (reset) begin
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speculative_0 <= 6'h0;
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speculative_1 <= 6'h1;
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speculative_2 <= 6'h2;
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speculative_3 <= 6'h3;
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speculative_4 <= 6'h4;
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speculative_5 <= 6'h5;
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speculative_6 <= 6'h6;
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speculative_7 <= 6'h7;
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speculative_8 <= 6'h8;
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speculative_9 <= 6'h9;
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speculative_10 <= 6'hA;
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speculative_11 <= 6'hB;
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speculative_12 <= 6'hC;
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speculative_13 <= 6'hD;
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speculative_14 <= 6'hE;
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speculative_15 <= 6'hF;
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speculative_16 <= 6'h10;
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speculative_17 <= 6'h11;
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speculative_18 <= 6'h12;
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speculative_19 <= 6'h13;
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speculative_20 <= 6'h14;
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speculative_21 <= 6'h15;
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speculative_22 <= 6'h16;
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speculative_23 <= 6'h17;
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speculative_24 <= 6'h18;
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speculative_25 <= 6'h19;
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speculative_26 <= 6'h1A;
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speculative_27 <= 6'h1B;
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speculative_28 <= 6'h1C;
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speculative_29 <= 6'h1D;
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speculative_30 <= 6'h1E;
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speculative_31 <= 6'h1F;
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committed_0 <= 6'h0;
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committed_1 <= 6'h1;
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committed_2 <= 6'h2;
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committed_3 <= 6'h3;
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committed_4 <= 6'h4;
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committed_5 <= 6'h5;
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committed_6 <= 6'h6;
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committed_7 <= 6'h7;
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committed_8 <= 6'h8;
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committed_9 <= 6'h9;
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committed_10 <= 6'hA;
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committed_11 <= 6'hB;
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committed_12 <= 6'hC;
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committed_13 <= 6'hD;
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committed_14 <= 6'hE;
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committed_15 <= 6'hF;
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committed_16 <= 6'h10;
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committed_17 <= 6'h11;
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committed_18 <= 6'h12;
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committed_19 <= 6'h13;
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committed_20 <= 6'h14;
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committed_21 <= 6'h15;
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committed_22 <= 6'h16;
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committed_23 <= 6'h17;
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committed_24 <= 6'h18;
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committed_25 <= 6'h19;
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committed_26 <= 6'h1A;
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committed_27 <= 6'h1B;
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committed_28 <= 6'h1C;
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committed_29 <= 6'h1D;
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committed_30 <= 6'h1E;
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committed_31 <= 6'h1F;
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end
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else begin
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if (io_recover) begin
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speculative_0 <= committedNext_0;
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speculative_1 <= committedNext_1;
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speculative_2 <= committedNext_2;
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speculative_3 <= committedNext_3;
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speculative_4 <= committedNext_4;
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speculative_5 <= committedNext_5;
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speculative_6 <= committedNext_6;
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speculative_7 <= committedNext_7;
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speculative_8 <= committedNext_8;
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speculative_9 <= committedNext_9;
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speculative_10 <= committedNext_10;
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speculative_11 <= committedNext_11;
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speculative_12 <= committedNext_12;
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speculative_13 <= committedNext_13;
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speculative_14 <= committedNext_14;
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speculative_15 <= committedNext_15;
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speculative_16 <= committedNext_16;
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speculative_17 <= committedNext_17;
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speculative_18 <= committedNext_18;
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speculative_19 <= committedNext_19;
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speculative_20 <= committedNext_20;
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speculative_21 <= committedNext_21;
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speculative_22 <= committedNext_22;
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speculative_23 <= committedNext_23;
|
|
speculative_24 <= committedNext_24;
|
|
speculative_25 <= committedNext_25;
|
|
speculative_26 <= committedNext_26;
|
|
speculative_27 <= committedNext_27;
|
|
speculative_28 <= committedNext_28;
|
|
speculative_29 <= committedNext_29;
|
|
speculative_30 <= committedNext_30;
|
|
speculative_31 <= committedNext_31;
|
|
end
|
|
else begin
|
|
automatic logic _GEN_66;
|
|
automatic logic _GEN_67 = io_wen_1 & (|io_rd_1);
|
|
_GEN_66 = io_wen_0 & (|io_rd_0);
|
|
if (_GEN_67 & ~(|io_rd_1))
|
|
speculative_0 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h0)
|
|
speculative_0 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h1)
|
|
speculative_1 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h1)
|
|
speculative_1 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h2)
|
|
speculative_2 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h2)
|
|
speculative_2 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h3)
|
|
speculative_3 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h3)
|
|
speculative_3 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h4)
|
|
speculative_4 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h4)
|
|
speculative_4 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h5)
|
|
speculative_5 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h5)
|
|
speculative_5 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h6)
|
|
speculative_6 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h6)
|
|
speculative_6 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h7)
|
|
speculative_7 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h7)
|
|
speculative_7 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h8)
|
|
speculative_8 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h8)
|
|
speculative_8 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h9)
|
|
speculative_9 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h9)
|
|
speculative_9 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'hA)
|
|
speculative_10 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'hA)
|
|
speculative_10 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'hB)
|
|
speculative_11 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'hB)
|
|
speculative_11 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'hC)
|
|
speculative_12 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'hC)
|
|
speculative_12 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'hD)
|
|
speculative_13 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'hD)
|
|
speculative_13 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'hE)
|
|
speculative_14 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'hE)
|
|
speculative_14 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'hF)
|
|
speculative_15 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'hF)
|
|
speculative_15 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h10)
|
|
speculative_16 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h10)
|
|
speculative_16 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h11)
|
|
speculative_17 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h11)
|
|
speculative_17 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h12)
|
|
speculative_18 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h12)
|
|
speculative_18 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h13)
|
|
speculative_19 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h13)
|
|
speculative_19 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h14)
|
|
speculative_20 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h14)
|
|
speculative_20 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h15)
|
|
speculative_21 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h15)
|
|
speculative_21 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h16)
|
|
speculative_22 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h16)
|
|
speculative_22 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h17)
|
|
speculative_23 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h17)
|
|
speculative_23 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h18)
|
|
speculative_24 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h18)
|
|
speculative_24 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h19)
|
|
speculative_25 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h19)
|
|
speculative_25 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h1A)
|
|
speculative_26 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h1A)
|
|
speculative_26 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h1B)
|
|
speculative_27 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h1B)
|
|
speculative_27 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h1C)
|
|
speculative_28 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h1C)
|
|
speculative_28 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h1D)
|
|
speculative_29 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h1D)
|
|
speculative_29 <= io_newPhys_0;
|
|
if (_GEN_67 & io_rd_1 == 5'h1E)
|
|
speculative_30 <= io_newPhys_1;
|
|
else if (_GEN_66 & io_rd_0 == 5'h1E)
|
|
speculative_30 <= io_newPhys_0;
|
|
if (_GEN_67 & (&io_rd_1))
|
|
speculative_31 <= io_newPhys_1;
|
|
else if (_GEN_66 & (&io_rd_0))
|
|
speculative_31 <= io_newPhys_0;
|
|
end
|
|
if (_GEN_33)
|
|
committed_0 <= io_commitPhys_1;
|
|
else if (_GEN_0)
|
|
committed_0 <= io_commitPhys_0;
|
|
if (_GEN_34)
|
|
committed_1 <= io_commitPhys_1;
|
|
else if (_GEN_1)
|
|
committed_1 <= io_commitPhys_0;
|
|
if (_GEN_35)
|
|
committed_2 <= io_commitPhys_1;
|
|
else if (_GEN_2)
|
|
committed_2 <= io_commitPhys_0;
|
|
if (_GEN_36)
|
|
committed_3 <= io_commitPhys_1;
|
|
else if (_GEN_3)
|
|
committed_3 <= io_commitPhys_0;
|
|
if (_GEN_37)
|
|
committed_4 <= io_commitPhys_1;
|
|
else if (_GEN_4)
|
|
committed_4 <= io_commitPhys_0;
|
|
if (_GEN_38)
|
|
committed_5 <= io_commitPhys_1;
|
|
else if (_GEN_5)
|
|
committed_5 <= io_commitPhys_0;
|
|
if (_GEN_39)
|
|
committed_6 <= io_commitPhys_1;
|
|
else if (_GEN_6)
|
|
committed_6 <= io_commitPhys_0;
|
|
if (_GEN_40)
|
|
committed_7 <= io_commitPhys_1;
|
|
else if (_GEN_7)
|
|
committed_7 <= io_commitPhys_0;
|
|
if (_GEN_41)
|
|
committed_8 <= io_commitPhys_1;
|
|
else if (_GEN_8)
|
|
committed_8 <= io_commitPhys_0;
|
|
if (_GEN_42)
|
|
committed_9 <= io_commitPhys_1;
|
|
else if (_GEN_9)
|
|
committed_9 <= io_commitPhys_0;
|
|
if (_GEN_43)
|
|
committed_10 <= io_commitPhys_1;
|
|
else if (_GEN_10)
|
|
committed_10 <= io_commitPhys_0;
|
|
if (_GEN_44)
|
|
committed_11 <= io_commitPhys_1;
|
|
else if (_GEN_11)
|
|
committed_11 <= io_commitPhys_0;
|
|
if (_GEN_45)
|
|
committed_12 <= io_commitPhys_1;
|
|
else if (_GEN_12)
|
|
committed_12 <= io_commitPhys_0;
|
|
if (_GEN_46)
|
|
committed_13 <= io_commitPhys_1;
|
|
else if (_GEN_13)
|
|
committed_13 <= io_commitPhys_0;
|
|
if (_GEN_47)
|
|
committed_14 <= io_commitPhys_1;
|
|
else if (_GEN_14)
|
|
committed_14 <= io_commitPhys_0;
|
|
if (_GEN_48)
|
|
committed_15 <= io_commitPhys_1;
|
|
else if (_GEN_15)
|
|
committed_15 <= io_commitPhys_0;
|
|
if (_GEN_49)
|
|
committed_16 <= io_commitPhys_1;
|
|
else if (_GEN_16)
|
|
committed_16 <= io_commitPhys_0;
|
|
if (_GEN_50)
|
|
committed_17 <= io_commitPhys_1;
|
|
else if (_GEN_17)
|
|
committed_17 <= io_commitPhys_0;
|
|
if (_GEN_51)
|
|
committed_18 <= io_commitPhys_1;
|
|
else if (_GEN_18)
|
|
committed_18 <= io_commitPhys_0;
|
|
if (_GEN_52)
|
|
committed_19 <= io_commitPhys_1;
|
|
else if (_GEN_19)
|
|
committed_19 <= io_commitPhys_0;
|
|
if (_GEN_53)
|
|
committed_20 <= io_commitPhys_1;
|
|
else if (_GEN_20)
|
|
committed_20 <= io_commitPhys_0;
|
|
if (_GEN_54)
|
|
committed_21 <= io_commitPhys_1;
|
|
else if (_GEN_21)
|
|
committed_21 <= io_commitPhys_0;
|
|
if (_GEN_55)
|
|
committed_22 <= io_commitPhys_1;
|
|
else if (_GEN_22)
|
|
committed_22 <= io_commitPhys_0;
|
|
if (_GEN_56)
|
|
committed_23 <= io_commitPhys_1;
|
|
else if (_GEN_23)
|
|
committed_23 <= io_commitPhys_0;
|
|
if (_GEN_57)
|
|
committed_24 <= io_commitPhys_1;
|
|
else if (_GEN_24)
|
|
committed_24 <= io_commitPhys_0;
|
|
if (_GEN_58)
|
|
committed_25 <= io_commitPhys_1;
|
|
else if (_GEN_25)
|
|
committed_25 <= io_commitPhys_0;
|
|
if (_GEN_59)
|
|
committed_26 <= io_commitPhys_1;
|
|
else if (_GEN_26)
|
|
committed_26 <= io_commitPhys_0;
|
|
if (_GEN_60)
|
|
committed_27 <= io_commitPhys_1;
|
|
else if (_GEN_27)
|
|
committed_27 <= io_commitPhys_0;
|
|
if (_GEN_61)
|
|
committed_28 <= io_commitPhys_1;
|
|
else if (_GEN_28)
|
|
committed_28 <= io_commitPhys_0;
|
|
if (_GEN_62)
|
|
committed_29 <= io_commitPhys_1;
|
|
else if (_GEN_29)
|
|
committed_29 <= io_commitPhys_0;
|
|
if (_GEN_63)
|
|
committed_30 <= io_commitPhys_1;
|
|
else if (_GEN_30)
|
|
committed_30 <= io_commitPhys_0;
|
|
if (_GEN_64)
|
|
committed_31 <= io_commitPhys_1;
|
|
else if (_GEN_31)
|
|
committed_31 <= io_commitPhys_0;
|
|
end
|
|
end // always @(posedge)
|
|
assign io_prs1_0 = _GEN_65[io_rs1_0];
|
|
assign io_prs1_1 = slot0Writes & io_rd_0 == io_rs1_1 ? io_newPhys_0 : _GEN_65[io_rs1_1];
|
|
assign io_prs2_0 = _GEN_65[io_rs2_0];
|
|
assign io_prs2_1 = slot0Writes & io_rd_0 == io_rs2_1 ? io_newPhys_0 : _GEN_65[io_rs2_1];
|
|
assign io_oldPrd_0 = _GEN_65[io_rd_0];
|
|
assign io_oldPrd_1 = slot0Writes & io_rd_0 == io_rd_1 ? io_newPhys_0 : _GEN_65[io_rd_1];
|
|
assign io_committedPhys_0 = committedNext_0;
|
|
assign io_committedPhys_1 = committedNext_1;
|
|
assign io_committedPhys_2 = committedNext_2;
|
|
assign io_committedPhys_3 = committedNext_3;
|
|
assign io_committedPhys_4 = committedNext_4;
|
|
assign io_committedPhys_5 = committedNext_5;
|
|
assign io_committedPhys_6 = committedNext_6;
|
|
assign io_committedPhys_7 = committedNext_7;
|
|
assign io_committedPhys_8 = committedNext_8;
|
|
assign io_committedPhys_9 = committedNext_9;
|
|
assign io_committedPhys_10 = committedNext_10;
|
|
assign io_committedPhys_11 = committedNext_11;
|
|
assign io_committedPhys_12 = committedNext_12;
|
|
assign io_committedPhys_13 = committedNext_13;
|
|
assign io_committedPhys_14 = committedNext_14;
|
|
assign io_committedPhys_15 = committedNext_15;
|
|
assign io_committedPhys_16 = committedNext_16;
|
|
assign io_committedPhys_17 = committedNext_17;
|
|
assign io_committedPhys_18 = committedNext_18;
|
|
assign io_committedPhys_19 = committedNext_19;
|
|
assign io_committedPhys_20 = committedNext_20;
|
|
assign io_committedPhys_21 = committedNext_21;
|
|
assign io_committedPhys_22 = committedNext_22;
|
|
assign io_committedPhys_23 = committedNext_23;
|
|
assign io_committedPhys_24 = committedNext_24;
|
|
assign io_committedPhys_25 = committedNext_25;
|
|
assign io_committedPhys_26 = committedNext_26;
|
|
assign io_committedPhys_27 = committedNext_27;
|
|
assign io_committedPhys_28 = committedNext_28;
|
|
assign io_committedPhys_29 = committedNext_29;
|
|
assign io_committedPhys_30 = committedNext_30;
|
|
assign io_committedPhys_31 = committedNext_31;
|
|
endmodule
|
|
|