fix: resolve OoO simulation timeout
This commit is contained in:
83
generated-ooo/CommitStage.sv
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83
generated-ooo/CommitStage.sv
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@@ -0,0 +1,83 @@
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// Generated by CIRCT firtool-1.139.0
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module CommitStage(
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input io_robValid_0,
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io_robValid_1,
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input [4:0] io_robEntry_0_archDest,
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input io_robEntry_0_writesDest,
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input [3:0] io_robEntry_0_opClass,
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input [5:0] io_robEntry_0_dest,
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io_robEntry_0_oldDest,
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input io_robEntry_0_exception,
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input [63:0] io_robEntry_0_exceptionCause,
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io_robEntry_0_badAddr,
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input io_robEntry_0_branchMispredict,
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input [63:0] io_robEntry_0_redirectPc,
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input io_robEntry_0_csrValid,
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input [4:0] io_robEntry_1_archDest,
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input io_robEntry_1_writesDest,
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input [5:0] io_robEntry_1_dest,
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io_robEntry_1_oldDest,
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input io_robEntry_1_exception,
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input [63:0] io_robEntry_1_exceptionCause,
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io_robEntry_1_badAddr,
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input io_robEntry_1_branchMispredict,
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input [63:0] io_robEntry_1_redirectPc,
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input io_robEntry_1_csrValid,
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output io_commitReady_0,
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io_commitReady_1,
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io_freeOldPhys_0,
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io_freeOldPhys_1,
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output [5:0] io_oldPhys_0,
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io_oldPhys_1,
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output io_commitMapValid_0,
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io_commitMapValid_1,
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output [4:0] io_commitArch_0,
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io_commitArch_1,
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output [5:0] io_commitPhys_0,
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io_commitPhys_1,
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output io_flush,
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output [63:0] io_redirectPc,
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output io_exception,
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output [63:0] io_exceptionCause,
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io_badAddr
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);
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wire firstTrap =
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io_robValid_0 & (io_robEntry_0_exception | io_robEntry_0_branchMispredict);
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wire secondTrap =
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io_robValid_1 & (io_robEntry_1_exception | io_robEntry_1_branchMispredict);
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wire io_commitReady_1_0 =
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io_robValid_1 & ~firstTrap & ~secondTrap
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& ~(io_robValid_0 & io_robValid_1 & io_robEntry_0_csrValid & io_robEntry_1_csrValid)
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& ~(io_robValid_0 & io_robEntry_0_opClass == 4'h4);
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wire _io_commitMapValid_0_T = io_robValid_0 & io_robEntry_0_writesDest;
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wire _io_commitMapValid_1_T = io_commitReady_1_0 & io_robEntry_1_writesDest;
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wire secondTrapSelected = ~io_robValid_0 & secondTrap;
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assign io_commitReady_0 = io_robValid_0;
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assign io_commitReady_1 = io_commitReady_1_0;
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assign io_freeOldPhys_0 =
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_io_commitMapValid_0_T & io_robEntry_0_oldDest != io_robEntry_0_dest;
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assign io_freeOldPhys_1 =
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_io_commitMapValid_1_T & io_robEntry_1_oldDest != io_robEntry_1_dest;
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assign io_oldPhys_0 = io_robEntry_0_oldDest;
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assign io_oldPhys_1 = io_robEntry_1_oldDest;
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assign io_commitMapValid_0 = _io_commitMapValid_0_T & (|io_robEntry_0_archDest);
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assign io_commitMapValid_1 = _io_commitMapValid_1_T & (|io_robEntry_1_archDest);
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assign io_commitArch_0 = io_robEntry_0_archDest;
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assign io_commitArch_1 = io_robEntry_1_archDest;
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assign io_commitPhys_0 = io_robEntry_0_dest;
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assign io_commitPhys_1 = io_robEntry_1_dest;
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assign io_flush = firstTrap | secondTrapSelected;
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assign io_redirectPc = firstTrap ? io_robEntry_0_redirectPc : io_robEntry_1_redirectPc;
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assign io_exception =
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firstTrap ? io_robEntry_0_exception : secondTrapSelected & io_robEntry_1_exception;
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assign io_exceptionCause =
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firstTrap
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? io_robEntry_0_exceptionCause
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: secondTrapSelected ? io_robEntry_1_exceptionCause : 64'h0;
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assign io_badAddr =
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firstTrap
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? io_robEntry_0_badAddr
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: secondTrapSelected ? io_robEntry_1_badAddr : 64'h0;
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endmodule
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