HFI: support IFS 10.8-0
Change-Id: Iebc0e2b50faf464efcc5134cc40dc52e0bd6eea7
This commit is contained in:
@@ -1,6 +1,6 @@
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struct hfi1_ctxtdata {
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union {
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char whole_struct[1408];
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char whole_struct[1160];
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struct {
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char padding0[144];
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u16 ctxt;
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@@ -1,6 +1,6 @@
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struct hfi1_devdata {
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union {
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char whole_struct[7872];
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char whole_struct[7808];
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struct {
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char padding0[3368];
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u8 *kregbase1;
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@@ -46,19 +46,19 @@ struct hfi1_devdata {
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u32 chip_rcv_array_count;
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};
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struct {
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char padding11[7392];
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char padding11[7264];
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struct hfi1_pportdata *pport;
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};
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struct {
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char padding12[7416];
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char padding12[7296];
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u16 flags;
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};
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struct {
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char padding13[7419];
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char padding13[7299];
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u8 first_dyn_alloc_ctxt;
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};
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struct {
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char padding14[7432];
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char padding14[7368];
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u64 sc2vl[4];
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};
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};
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@@ -23,7 +23,7 @@ struct hfi1_user_sdma_pkt_q {
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};
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struct {
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char padding5[288];
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unsigned int state;
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enum pkt_q_sdma_state state;
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};
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};
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};
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@@ -1,6 +1,6 @@
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struct hfi1_pportdata {
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union {
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char whole_struct[12928];
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char whole_struct[12992];
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struct {
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char padding0[2113];
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u8 vls_operational;
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@@ -50,47 +50,39 @@ struct user_sdma_request {
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u64 seqsubmitted;
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};
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struct {
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char padding12[144];
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int status;
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};
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struct {
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char padding13[192];
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char padding12[192];
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struct list_head txps;
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};
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struct {
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char padding14[208];
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char padding13[208];
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u64 seqnum;
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};
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struct {
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char padding15[216];
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char padding14[216];
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u32 tidoffset;
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};
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struct {
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char padding16[220];
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char padding15[220];
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u32 koffset;
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};
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struct {
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char padding17[224];
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char padding16[224];
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u32 sent;
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};
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struct {
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char padding18[228];
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char padding17[228];
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u16 tididx;
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};
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struct {
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char padding19[230];
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char padding18[230];
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u8 iov_idx;
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};
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struct {
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char padding20[231];
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u8 done;
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};
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struct {
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char padding21[232];
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char padding19[231];
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u8 has_error;
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};
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struct {
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char padding22[240];
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char padding20[232];
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struct user_sdma_iovec iovs[8];
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};
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};
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@@ -114,6 +114,11 @@ extern uint extended_psn;
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#define KDETH_OM_LARGE_SHIFT 6
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#define KDETH_OM_MAX_SIZE (1 << ((KDETH_OM_LARGE / KDETH_OM_SMALL) + 1))
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enum pkt_q_sdma_state {
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SDMA_PKT_Q_ACTIVE,
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SDMA_PKT_Q_DEFERRED,
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};
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#include <hfi1/hfi1_generated_hfi1_user_sdma_pkt_q.h>
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struct hfi1_user_sdma_comp_q {
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@@ -57,8 +57,8 @@ HFI1_KO="${1-$(modinfo -n hfi1)}" || \
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> "${HDR_PREFIX}sdma_engine.h"
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"$DES_BIN" "$HFI1_KO" user_sdma_request \
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data_iovs pq cq status txps info hdr tidoffset data_len \
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iov_idx sent seqnum done has_error koffset tididx \
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data_iovs pq cq txps info hdr tidoffset data_len \
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iov_idx sent seqnum has_error koffset tididx \
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tids n_tids sde ahg_idx iovs seqcomp seqsubmitted \
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> "${HDR_PREFIX}user_sdma_request.h"
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@@ -60,9 +60,6 @@ static uint hfi1_sdma_comp_ring_size = 128;
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#define SDMA_REQ_HAS_ERROR 4
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#define SDMA_REQ_DONE_ERROR 5
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#define SDMA_PKT_Q_INACTIVE BIT(0)
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#define SDMA_PKT_Q_ACTIVE BIT(1)
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#define SDMA_PKT_Q_DEFERRED BIT(2)
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/*
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* Maximum retry attempts to submit a TX request
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@@ -549,7 +546,6 @@ int hfi1_user_sdma_process_request(void *private_data, struct iovec *iovec,
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struct sdma_req_info info;
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struct user_sdma_request *req;
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u8 opcode, sc, vl;
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int req_queued = 0;
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u16 dlid;
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u32 selector;
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unsigned long size_info = sizeof(info);
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@@ -620,7 +616,6 @@ int hfi1_user_sdma_process_request(void *private_data, struct iovec *iovec,
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req->data_len = 0;
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req->pq = pq;
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req->cq = cq;
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req->status = -1;
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req->ahg_idx = -1;
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req->iov_idx = 0;
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req->sent = 0;
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@@ -628,13 +623,15 @@ int hfi1_user_sdma_process_request(void *private_data, struct iovec *iovec,
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req->seqcomp = 0;
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req->seqsubmitted = 0;
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req->tids = NULL;
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req->done = 0;
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req->has_error = 0;
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INIT_LIST_HEAD(&req->txps);
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fast_memcpy(&req->info, &info, size_info);
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/* The request is initialized, count it */
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ihk_atomic_inc(&pq->n_reqs);
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if (req_opcode(info.ctrl) == EXPECTED) {
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/* expected must have a TID info and at least one data vector */
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if (req->data_iovs < 2) {
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@@ -841,25 +838,14 @@ int hfi1_user_sdma_process_request(void *private_data, struct iovec *iovec,
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}
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set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
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atomic_inc(&pq->n_reqs);
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req_queued = 1;
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pq->state = SDMA_PKT_Q_ACTIVE;
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/* Send the first N packets in the request to buy us some time */
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ret = user_sdma_send_pkts(req, pcount, txreq_cache);
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if (unlikely(ret < 0 && ret != -EBUSY)) {
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req->status = ret;
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goto free_req;
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}
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/*
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* It is possible that the SDMA engine would have processed all the
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* submitted packets by the time we get here. Therefore, only set
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* packet queue state to ACTIVE if there are still uncompleted
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* requests.
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*/
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if (atomic_read(&pq->n_reqs))
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xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
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/*
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* This is a somewhat blocking send implementation.
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* The driver will block the caller until all packets of the
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@@ -870,16 +856,12 @@ int hfi1_user_sdma_process_request(void *private_data, struct iovec *iovec,
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ret = user_sdma_send_pkts(req, pcount, txreq_cache);
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if (ret < 0) {
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if (ret != -EBUSY) {
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req->status = ret;
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WRITE_ONCE(req->has_error, 1);
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if (ACCESS_ONCE(req->seqcomp) ==
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req->seqsubmitted - 1)
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goto free_req;
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return ret;
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goto free_req;
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}
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{
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unsigned long ts = rdtsc();
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while (pq->state != SDMA_PKT_Q_ACTIVE) {
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while (ihk_atomic_read(&pq->n_reqs) > 0 &&
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pq->state != SDMA_PKT_Q_ACTIVE) {
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cpu_pause();
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}
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kprintf("%s: waited %lu cycles for SDMA_PKT_Q_ACTIVE\n",
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@@ -891,9 +873,26 @@ int hfi1_user_sdma_process_request(void *private_data, struct iovec *iovec,
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return 0;
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free_req:
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user_sdma_free_request(req, true);
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if (req_queued)
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/*
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* If the submitted seqsubmitted == npkts, the completion routine
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* controls the final state. If sequbmitted < npkts, wait for any
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* outstanding packets to finish before cleaning up.
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*/
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if (req->seqsubmitted < req->info.npkts) {
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if (req->seqsubmitted) {
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{
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unsigned long ts = rdtsc();
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while (req->seqcomp != req->seqsubmitted - 1) {
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cpu_pause();
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}
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kprintf("%s: waited %lu cycles for req->seqcomp\n",
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__FUNCTION__, rdtsc() - ts);
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}
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}
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user_sdma_free_request(req, true);
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pq_update(pq);
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set_comp_state(pq, cq, info.comp_idx, ERROR, req->status);
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set_comp_state(pq, cq, info.comp_idx, ERROR, ret);
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}
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return ret;
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}
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@@ -1263,7 +1262,6 @@ dosend:
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&req->txps, &count);
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req->seqsubmitted += count;
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if (req->seqsubmitted == req->info.npkts) {
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WRITE_ONCE(req->done, 1);
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/*
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* The txreq has already been submitted to the HW queue
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* so we can free the AHG entry now. Corruption will not
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@@ -1572,7 +1570,7 @@ static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
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struct user_sdma_request *req;
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struct hfi1_user_sdma_pkt_q *pq;
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struct hfi1_user_sdma_comp_q *cq;
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u16 idx;
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enum hfi1_sdma_comp_state state = COMPLETE;
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if (!tx->req)
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return;
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@@ -1585,37 +1583,24 @@ static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
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SDMA_DBG(req, "SDMA completion with error %d",
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status);
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WRITE_ONCE(req->has_error, 1);
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state = ERROR;
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}
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req->seqcomp = tx->seqnum;
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kmalloc_cache_free(tx);
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tx = NULL;
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idx = req->info.comp_idx;
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if (req->status == -1 && status == SDMA_TXREQ_S_OK) {
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if (req->seqcomp == req->info.npkts - 1) {
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req->status = 0;
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user_sdma_free_request(req, false);
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pq_update(pq);
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set_comp_state(pq, cq, idx, COMPLETE, 0);
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}
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} else {
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if (status != SDMA_TXREQ_S_OK)
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req->status = status;
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if (req->seqcomp == (ACCESS_ONCE(req->seqsubmitted) - 1) &&
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(READ_ONCE(req->done) ||
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READ_ONCE(req->has_error))) {
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user_sdma_free_request(req, false);
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pq_update(pq);
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set_comp_state(pq, cq, idx, ERROR, req->status);
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}
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}
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/* sequence isn't complete? We are done */
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if (req->seqcomp != req->info.npkts - 1)
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return;
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user_sdma_free_request(req, false);
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set_comp_state(pq, cq, req->info.comp_idx, state, status);
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pq_update(pq);
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}
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static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
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{
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if (atomic_dec_and_test(&pq->n_reqs)) {
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xchg(&pq->state, SDMA_PKT_Q_INACTIVE);
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//TODO: pq_update wake_up
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//wake_up(&pq->wait);
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}
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