64-BitBrainstorm_2026/AMSS-NCKU
8
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Commit Graph

  • 96829d0441 Optimize Z4C GPU runtime defaults CGH0S7 2026-05-07 15:37:09 +08:00
  • 83afaf19ce Skip zero EM resident downloads CGH0S7 2026-05-07 13:04:46 +08:00
  • cb911dec06 Add EM GPU fast paths and defaults CGH0S7 2026-05-07 12:18:56 +08:00
  • dd0e20d8c7 Fix BSSN-EScalar CUDA boundary and scalar KO CGH0S7 2026-05-06 15:44:35 +08:00
  • ffa0d801ed Default Python GPU runner to EScalar fast path CGH0S7 2026-05-06 00:12:46 +08:00
  • ae64a22178 Complete BSSN-EScalar CUDA resident transfers CGH0S7 2026-05-05 23:57:42 +08:00
  • bf74f2f688 updated aocc openmpi path CGH0S7 2026-05-05 11:13:33 +08:00
  • 85fe29cc2e Optimize BSSN-EScalar CUDA path CGH0S7 2026-05-05 10:47:46 +08:00
  • e4c10eca0f Stabilize EScalar CUDA fallback path cjy-falcons-k3 CGH0S7 2026-05-03 16:05:47 +08:00
  • 4430d04ee7 Stabilize EScalar CUDA sync defaults CGH0S7 2026-05-03 00:24:50 +08:00
  • 74ba5feb86 Pin EScalar scalar CUDA transfers CGH0S7 2026-05-02 19:21:57 +08:00
  • 6f28111a43 Keep EScalar mixed GPU RP opt-in CGH0S7 2026-05-02 18:38:43 +08:00
  • f638cbc4e8 Add mixed GPU RP path for EScalar CGH0S7 2026-05-02 18:27:26 +08:00
  • 59a216ad93 Optimize BSSN EScalar GPU path baseline CGH0S7 2026-05-02 18:19:15 +08:00
  • 52beb4d153 Checkpoint Z4C CUDA resident sync progress CGH0S7 2026-05-02 10:53:52 +08:00
  • ba61702fc0 Checkpoint Z4C CUDA throttling progress CGH0S7 2026-05-02 10:04:23 +08:00
  • fcd98649f6 Checkpoint Z4C CUDA optimization progress CGH0S7 2026-05-02 08:55:25 +08:00
  • a5c8188305 Disable unsafe Z4C AMR device path by default CGH0S7 2026-05-02 01:36:41 +08:00
  • 383e936e88 Save Z4C CUDA optimization progress CGH0S7 2026-05-02 00:49:02 +08:00
  • 06f62dee36 Switch back to Intel toolchain as the default option ianchb 2026-05-01 21:59:13 +08:00
  • 531b31e8db Stabilize cached Z4C CUDA sync after regrid CGH0S7 2026-05-01 20:04:04 +08:00
  • 30b778daa3 Save Z4C CUDA transfer progress CGH0S7 2026-05-01 18:51:19 +08:00
  • db9383e439 Initialize cached sync runtime in derived evolvers CGH0S7 2026-05-01 18:34:43 +08:00
  • 35b6ceff02 Broaden cached CUDA sync paths CGH0S7 2026-05-01 18:03:04 +08:00
  • 51f3819892 Save generated source formatting state CGH0S7 2026-04-30 20:47:44 +08:00
  • a9a3809148 Default Python launcher to fast GPU path CGH0S7 2026-04-30 20:15:34 +08:00
  • b1974ef146 Stabilize device AMR restrict across regrid CGH0S7 2026-04-30 20:01:18 +08:00
  • be9033f449 Add optional CUDA surface interpolation CGH0S7 2026-04-30 19:21:19 +08:00
  • 6835608f92 Add configurable analysis MAP cadence CGH0S7 2026-04-30 19:10:12 +08:00
  • e0d0673c8e Enable optimized GPU runs from Python launcher CGH0S7 2026-04-30 18:31:31 +08:00
  • da4d56ccf7 Optimize BSSN surface interpolation fast path CGH0S7 2026-04-30 18:25:21 +08:00
  • a6483d013d Add CUDA AMR restrict diagnostics CGH0S7 2026-04-30 12:20:44 +08:00
  • 8486532920 Add resident BSSN GPU point interpolation CGH0S7 2026-04-30 11:39:15 +08:00
  • 18e9c9cc50 Optimize BSSN CUDA resident AMR prolong path CGH0S7 2026-04-30 10:58:15 +08:00
  • 1ee229a91f Add keyed BSSN CUDA resident banks CGH0S7 2026-04-29 19:44:19 +08:00
  • 68eab03bac Add opt-in BSSN CUDA resident AMR path CGH0S7 2026-04-29 19:15:37 +08:00
  • 090d8657ae Optimize BSSN CUDA state transfers CGH0S7 2026-04-29 18:34:31 +08:00
  • 22c1e7168b Optimize BSSN CUDA resident state and CUDA-aware MPI CGH0S7 2026-04-29 17:05:10 +08:00
  • a0dab90bcb Switch to NVIDIA HPC Toolchain chb-cuda-new ianchb 2026-04-29 08:30:47 +08:00
  • 96c5b79a23 Migrate build system from Intel oneAPI to AMD AOCC/AOCL/OpenMPI CGH0S7 2026-04-28 23:03:59 +08:00
  • 6ca9fece2e Add OpenMPI rpath and LD_LIBRARY_PATH export for reliable linking CGH0S7 2026-04-28 22:43:57 +08:00
  • 516cdea502 Replace MKL with OpenBLAS CGH0S7 2026-04-28 22:33:43 +08:00
  • 9687d9a3dd Switch build system from Intel oneAPI to GCC + OpenMPI CGH0S7 2026-04-28 22:00:58 +08:00
  • f669180572 Merge branch 'cjy-vitality' CGH0S7 2026-04-28 16:55:47 +08:00
  • d9c7ea8085 Use cudaMemcpyAsync with dedicated transfer stream for H2D/D2H transfers lzd-cuda abnerluo 2026-04-28 08:23:34 +08:00
  • 0992e2219a Migrate build system from Intel oneAPI to AMD AOCC/AOCL/OpenMPI cjy-spirit CGH0S7 2026-04-28 02:19:00 +08:00
  • 0db537479b Fix BSSN build config selection cjy-vitality CGH0S7 2026-04-27 18:42:34 +08:00
  • 1f3fd264c0 Add missing setup_transfer_caches() to bssnEM_class::Initialize() CGH0S7 2026-04-27 15:32:27 +08:00
  • 442674cedc Fix direct sync_cache accesses bypassing use_transfer_cache() guard CGH0S7 2026-04-27 14:50:59 +08:00
  • a13b6901f6 Fix Z4C C++ gauge damping ordering ianchb 2026-04-26 15:38:13 +08:00
  • c689cc8dc9 [WIP] Add CUDA support for Z4C Rewritten done by Codex. This still has errors, do not pick this one now. ianchb 2026-04-27 08:27:24 +08:00
  • 60fee8f1c1 Fix Z4C C++ gauge damping ordering ianchb 2026-04-26 15:38:13 +08:00
  • 843b116954 Add C++ Z4C RHS path and port some BSSN optimizations ianchb 2026-04-25 08:03:19 +08:00
  • c768e1220b Also disable cached sync for Z4C ianchb 2026-04-24 21:06:13 +08:00
  • 02f149e2e3 Disable cached sync for BSSN-EScalar CGH0S7 2026-04-24 01:58:57 +08:00
  • 422e8ec4dc Fallback BSSN-EScalar restrict/prolong path CGH0S7 2026-04-24 01:37:54 +08:00
  • c4909b9843 更新精度检查脚本加入图像比对检查 CGH0S7 2026-04-15 00:49:46 +08:00
  • f521a97563 Fix ABE CPU version build error ianchb 2026-04-25 09:39:49 +08:00
  • 53c55451b3 Update makefile and scripts for CUDA BSSN configuration and build commands ianchb 2026-04-25 09:19:50 +08:00
  • 768345954f Add optional BSSN kernel profiling switches CGH0S7 2026-04-13 16:51:06 +08:00
  • 9a6df6438b Remove dead chi derivative setup in BSSN RHS CGH0S7 2026-04-13 15:55:43 +08:00
  • 8e9463aa90 Localize chi Ricci intermediates in RHS CGH0S7 2026-04-13 15:14:31 +08:00
  • 7c6f15002e Elide dead stores in BSSN RHS hot path CGH0S7 2026-04-13 15:10:22 +08:00
  • 6410c62e3e Add fine-grained step timing and trim BH RHS overhead CGH0S7 2026-04-13 14:50:55 +08:00
  • 11977eb82f Merge wave and mass extraction interpolation CGH0S7 2026-04-13 13:17:36 +08:00
  • cce8a44fc4 Cache wave extraction angular kernels CGH0S7 2026-04-13 12:40:20 +08:00
  • c589097618 Reuse mass integrand across detector radii CGH0S7 2026-04-13 11:55:41 +08:00
  • b713e5a9be Batch constraint norm reductions CGH0S7 2026-04-13 11:48:02 +08:00
  • 0396701572 Optimize constraint refresh after regrid CGH0S7 2026-04-13 11:39:50 +08:00
  • 7e67feddbf Add C++ Z4C RHS path and port some BSSN optimizations ianchb 2026-04-25 08:03:19 +08:00
  • 8d28c29a91 Default to safe BSSN-EScalar C kernel CGH0S7 2026-04-25 02:02:01 +08:00
  • 0cf58176d9 Add safe BSSN-EScalar kernel and transfer toggles CGH0S7 2026-04-25 01:41:55 +08:00
  • 0f1d0de1e7 Stabilize and wire BSSN-EScalar C path CGH0S7 2026-04-25 00:08:35 +08:00
  • c60bc03664 Also disable cached sync for Z4C ianchb 2026-04-24 21:06:13 +08:00
  • 45e3c725f9 Trigger-Discipline: parallelize result plotting Trigger-Discipline CGH0S7 2026-04-24 10:04:57 +08:00
  • 7f603f189b Trigger-Discipline: port TwoPuncture OpenMP optimizations CGH0S7 2026-04-24 09:25:13 +08:00
  • a821f21a23 .gitignore updated CGH0S7 2026-04-24 09:10:12 +08:00
  • 34fe3e6aa5 Trigger-Discipline: port conservative build and fmisc optimizations CGH0S7 2026-04-24 09:09:50 +08:00
  • b57d80ca61 Disable cached sync for BSSN-EScalar CGH0S7 2026-04-24 01:58:57 +08:00
  • 9cd3741a90 Fallback BSSN-EScalar restrict/prolong path CGH0S7 2026-04-24 01:37:54 +08:00
  • 17109fde9b [TEST]UPSTREAM: Pick some source changes from 48080d0a97 main-upstream ianchb 2026-04-23 20:55:40 +08:00
  • c185f99ee3 UPSTREAM: Pick source changes from a5b2dd9e3c ianchb 2026-04-23 20:18:44 +08:00
  • 4a13a9d37a UPSTREAM: Pick some source changes from 57ec145e59 ianchb 2026-04-23 20:10:12 +08:00
  • bb20c9a876 fix ADM Constrant Violation Analysis ianchb 2026-04-15 08:37:17 +08:00
  • ac82ebd889 更新精度检查脚本加入图像比对检查 CGH0S7 2026-04-15 00:49:46 +08:00
  • 8fe60ea703 Add zero matter handling and interpolation for resident state in CUDA BSSN ianchb 2026-04-15 00:25:53 +08:00
  • 9ab7e7c7f9 Fuse phases 5 and 6 for Gamma_rhs computation and optimize phases 8 and 9 for efficiency ianchb 2026-04-14 23:23:04 +08:00
  • f9119e8a2a Add resident-GA mode switch and simplify sync logic ianchb 2026-04-14 20:08:48 +08:00
  • 726d743376 Fuse Ricci assembly and optimize trK/Aij gauge kernels ianchb 2026-04-14 19:20:12 +08:00
  • af344bf1e5 Add Phase-10 Ricci kernels and batch launch flow ianchb 2026-04-14 19:00:22 +08:00
  • 7191fc0b96 Move resident sync comm buffers into StepAllocation pool ianchb 2026-04-13 21:04:44 +08:00
  • b3ec244cf9 Add batched first/second derivative kernels for CUDA RHS ianchb 2026-04-13 20:51:08 +08:00
  • e952ee8e91 Batch GA/BH subset sync with indexed GPU pack/unpack buffers ianchb 2026-04-13 20:27:30 +08:00
  • 3f3f16e881 Switch legacy build to GCC and OpenMPI legacy CGH0S7 2026-04-13 19:39:30 +08:00
  • 9c31384b2f Add optional BSSN kernel profiling switches cjy-goldsteps CGH0S7 2026-04-13 16:51:06 +08:00
  • e4e741caa1 Remove dead chi derivative setup in BSSN RHS CGH0S7 2026-04-13 15:55:43 +08:00
  • 65e0f95f40 Localize chi Ricci intermediates in RHS CGH0S7 2026-04-13 15:14:31 +08:00
  • f9fbf97e64 Elide dead stores in BSSN RHS hot path CGH0S7 2026-04-13 15:10:22 +08:00
  • 968522995b Add fine-grained step timing and trim BH RHS overhead CGH0S7 2026-04-13 14:50:55 +08:00
  • f3988ac8ca Merge wave and mass extraction interpolation CGH0S7 2026-04-13 13:17:36 +08:00