felsabbagh3 ffb760cf73 Optimized cache writeback path by 1) VX_fair_arbiter and 2) Added a wb register between LSU and WB arbiter

2020-06-28 14:27:47 -07:00

..

VX_bank_core_req_arb.v

round robin arbiter + auto buffered queue + fixed dcache arbiter

2020-06-20 17:56:04 -04:00

VX_bank.v

Added cache critical path optimizations

2020-06-27 16:12:22 -07:00

VX_cache_config.vh

round robin arbiter + auto buffered queue + fixed dcache arbiter

2020-06-20 17:56:04 -04:00

VX_cache_core_req_bank_sel.v

fix l2 cache issues

2020-06-04 18:34:14 -04:00

VX_cache_core_rsp_merge.v

Optimized cache writeback path by 1) VX_fair_arbiter and 2) Added a wb register between LSU and WB arbiter

2020-06-28 14:27:47 -07:00

VX_cache_dram_fill_arb.v

round robin arbiter + auto buffered queue + fixed dcache arbiter

2020-06-20 17:56:04 -04:00

VX_cache_dram_req_arb.v

fpga fixes

2020-06-27 14:03:20 -07:00

VX_cache_miss_resrv.v

fpga fixes

2020-06-27 14:03:20 -07:00

VX_cache.v

fpga fixes

2020-06-27 14:03:20 -07:00

VX_prefetcher.v

fpga fixes

2020-06-27 14:03:20 -07:00

VX_snp_forwarder.v

few updates

2020-06-23 09:28:24 -07:00

VX_snp_rsp_arb.v

round robin arbiter + auto buffered queue + fixed dcache arbiter

2020-06-20 17:56:04 -04:00

VX_tag_data_access.v

minor update

2020-06-27 17:46:45 -04:00

VX_tag_data_structure.v

opae rtl fixes

2020-06-01 23:06:13 -07:00