32 lines
444 B
Verilog
32 lines
444 B
Verilog
`include "VX_define.v"
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`ifndef VX_F_D_INTER
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`define VX_F_D_INTER
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interface VX_inst_meta_inter ();
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wire[31:0] instruction;
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wire[31:0] inst_pc;
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wire[`NW_M1:0] warp_num;
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wire[`NT_M1:0] valid;
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// source-side view
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modport snk (
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input instruction,
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input inst_pc,
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input warp_num,
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input valid
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);
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// sink-side view
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modport src (
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output instruction,
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output inst_pc,
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output warp_num,
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output valid
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);
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endinterface
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`endif |