Blaise Tine fceb561cbd synchronous reset network optimization: only reset register when required

2020-11-11 20:54:54 -08:00

..

configs

project directories reorganization

2020-04-14 06:35:20 -04:00

models/memory

RTL code refactoring

2020-04-19 03:38:00 -04:00

modelsim

yosys synthesis refactoring

2020-07-10 18:56:41 -04:00

old_rtl

refactoring fixes

2020-04-14 19:39:59 -04:00

opae

synchronous reset network optimization: only reset register when required

2020-11-11 20:54:54 -08:00

rtl

synchronous reset network optimization: only reset register when required

2020-11-11 20:54:54 -08:00

scripts

cache fixes and opyimization - fmax moved from 162 mhz to 220 mhz!!!

2020-11-05 03:49:50 -08:00

simulate

fixed bank_core_req_abr critical path

2020-11-08 18:25:32 -08:00

syn

minor update

2020-10-20 08:45:21 -07:00

unit_tests

Merge branch 'master' of https://github.com/vortexgpgpu/vortex-dev

2020-11-10 14:01:58 -05:00

.gitignore

adding dram writeenable support + scheduler bug fixes

2020-05-27 19:00:23 -04:00

Makefile

scope refactoring

2020-10-03 18:53:21 -04:00