Hansung Kim f5a9ca5bf3 tensor: Enqueue both insts in pair to issue queue ...

Otherwise the first-in-pair instructions can run ahead, latching their
inputs for the next pair before the second-in-pair insts finish compute
on the current one.  Might introduce more frontend stalls, need more
experimenting

2024-05-29 14:47:25 -07:00

..

afu

minor update

2023-11-12 23:40:59 -08:00

cache

synthesizable design

2024-04-17 18:05:51 -07:00

core

tensor: Enqueue both insts in pair to issue queue

2024-05-29 14:47:25 -07:00

fpu

tensor: Enqueue both insts in pair to issue queue

2024-05-29 14:47:25 -07:00

interfaces

Add perf counter for stall by any operand hazard

2024-04-15 01:01:26 -07:00

libs

proper srams

2024-05-07 13:52:07 -07:00

mem

synthesizable design

2024-04-17 18:05:51 -07:00

.DS_Store

project directories reorganization

2020-04-14 06:35:20 -04:00

Vortex_axi.sv

Vortex 2.0 changes:

2023-11-10 02:47:05 -08:00

Vortex.sv

adding tracking for SFU stalls

2023-12-28 12:12:11 -08:00

VX_cluster.sv

minor updates

2023-12-30 00:52:44 -08:00

VX_config.vh

tensor: Improve commit efficiency by decoupling dpu with fifo

2024-05-26 22:00:25 -07:00

VX_core_wrapper.sv

store fencing, large smem, fix tensor core for firesim

2024-05-15 21:45:48 -07:00

VX_define.vh

initial tensor core

2024-03-20 02:46:00 -07:00

VX_gpu_pkg.sv

minor updates

2023-12-30 00:52:44 -08:00

VX_platform.vh

store fencing, large smem, fix tensor core for firesim

2024-05-15 21:45:48 -07:00

VX_scope.vh

Vortex 2.0 changes:

2023-11-10 02:47:05 -08:00

VX_socket.sv

minor updates

2023-12-30 00:52:44 -08:00

VX_types.vh

accelerator cisc

2024-05-07 13:58:32 -07:00