132 lines
5.9 KiB
C++
132 lines
5.9 KiB
C++
// Verilated -*- C++ -*-
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// DESCRIPTION: Verilator output: Design implementation internals
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// See Vcache_simX.h for the primary calling header
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#include "Vcache_simX_cache_simX.h" // For This
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#include "Vcache_simX__Syms.h"
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//--------------------
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// STATIC VARIABLES
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//--------------------
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VL_CTOR_IMP(Vcache_simX_cache_simX) {
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VL_CELL (__PVT__VX_icache_req, Vcache_simX_VX_icache_request_inter);
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VL_CELL (__PVT__VX_icache_rsp, Vcache_simX_VX_icache_response_inter);
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VL_CELL (__PVT__VX_dram_req_rsp_icache, Vcache_simX_VX_dram_req_rsp_inter__N1_NB4);
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VL_CELL (__PVT__VX_dcache_req, Vcache_simX_VX_dcache_request_inter);
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VL_CELL (__PVT__VX_dcache_rsp, Vcache_simX_VX_dcache_response_inter);
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VL_CELL (__PVT__VX_dram_req_rsp, Vcache_simX_VX_dram_req_rsp_inter__N4_NB4);
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VL_CELL (__PVT__dmem_controller, Vcache_simX_VX_dmem_controller__V0_VB1000);
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// Reset internal values
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// Reset structure values
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clk = VL_RAND_RESET_I(1);
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reset = VL_RAND_RESET_I(1);
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in_icache_pc_addr = VL_RAND_RESET_I(32);
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in_icache_valid_pc_addr = VL_RAND_RESET_I(1);
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out_icache_stall = VL_RAND_RESET_I(1);
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in_dcache_mem_read = VL_RAND_RESET_I(3);
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in_dcache_mem_write = VL_RAND_RESET_I(3);
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{ int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
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in_dcache_in_valid[__Vi0] = VL_RAND_RESET_I(1);
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}}
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{ int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
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in_dcache_in_address[__Vi0] = VL_RAND_RESET_I(32);
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}}
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out_dcache_stall = VL_RAND_RESET_I(1);
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__PVT__icache_i_m_ready = VL_RAND_RESET_I(1);
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__PVT__dcache_i_m_ready = VL_RAND_RESET_I(1);
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}
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void Vcache_simX_cache_simX::__Vconfigure(Vcache_simX__Syms* vlSymsp, bool first) {
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if (0 && first) {} // Prevent unused
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this->__VlSymsp = vlSymsp;
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}
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Vcache_simX_cache_simX::~Vcache_simX_cache_simX() {
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}
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//--------------------
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// Internal Methods
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void Vcache_simX_cache_simX::_settle__TOP__v__1(Vcache_simX__Syms* __restrict vlSymsp) {
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VL_DEBUG_IF(VL_PRINTF(" Vcache_simX_cache_simX::_settle__TOP__v__1\n"); );
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Vcache_simX* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
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// Body
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((0xeU & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| vlSymsp->TOP__v.in_dcache_in_valid[0U]);
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((0xdU & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| (vlSymsp->TOP__v.in_dcache_in_valid[1U]
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<< 1U));
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((0xbU & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| (vlSymsp->TOP__v.in_dcache_in_valid[2U]
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<< 2U));
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((7U & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| (vlSymsp->TOP__v.in_dcache_in_valid[3U]
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<< 3U));
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}
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VL_INLINE_OPT void Vcache_simX_cache_simX::_sequent__TOP__v__2(Vcache_simX__Syms* __restrict vlSymsp) {
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VL_DEBUG_IF(VL_PRINTF(" Vcache_simX_cache_simX::_sequent__TOP__v__2\n"); );
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Vcache_simX* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
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// Body
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// ALWAYS at cache_simX.v:93
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if (vlTOPp->reset) {
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vlSymsp->TOP__v.__PVT__icache_i_m_ready = 0U;
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vlSymsp->TOP__v.__PVT__dcache_i_m_ready = 0U;
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} else {
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vlSymsp->TOP__v.__PVT__icache_i_m_ready = (1U
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== (IData)(vlSymsp->TOP__v__dmem_controller.__PVT__icache__DOT__state));
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vlSymsp->TOP__v.__PVT__dcache_i_m_ready = (1U
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== (IData)(vlSymsp->TOP__v__dmem_controller.__PVT__dcache__DOT__state));
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}
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}
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VL_INLINE_OPT void Vcache_simX_cache_simX::_combo__TOP__v__3(Vcache_simX__Syms* __restrict vlSymsp) {
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VL_DEBUG_IF(VL_PRINTF(" Vcache_simX_cache_simX::_combo__TOP__v__3\n"); );
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Vcache_simX* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
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// Body
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((0xeU & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| vlSymsp->TOP__v.in_dcache_in_valid[0U]);
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((0xdU & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| (vlSymsp->TOP__v.in_dcache_in_valid[1U]
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<< 1U));
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((0xbU & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| (vlSymsp->TOP__v.in_dcache_in_valid[2U]
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<< 2U));
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid
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= ((7U & (IData)(vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_valid))
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| (vlSymsp->TOP__v.in_dcache_in_valid[3U]
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<< 3U));
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[0U]
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= vlSymsp->TOP__v.in_dcache_in_address[0U];
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[1U]
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= vlSymsp->TOP__v.in_dcache_in_address[1U];
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[2U]
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= vlSymsp->TOP__v.in_dcache_in_address[2U];
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[3U]
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= vlSymsp->TOP__v.in_dcache_in_address[3U];
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}
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void Vcache_simX_cache_simX::_settle__TOP__v__4(Vcache_simX__Syms* __restrict vlSymsp) {
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VL_DEBUG_IF(VL_PRINTF(" Vcache_simX_cache_simX::_settle__TOP__v__4\n"); );
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Vcache_simX* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
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// Body
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[0U]
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= vlSymsp->TOP__v.in_dcache_in_address[0U];
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[1U]
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= vlSymsp->TOP__v.in_dcache_in_address[1U];
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[2U]
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= vlSymsp->TOP__v.in_dcache_in_address[2U];
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vlSymsp->TOP__v__VX_dcache_req.__PVT__out_cache_driver_in_address[3U]
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= vlSymsp->TOP__v.in_dcache_in_address[3U];
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}
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