trmontgomery e6a8df7be1 miss vec is displayed

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..

.Makefile.swp

read and write complete

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cachesim.cpp

miss vec is displayed

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cachesim.h

miss vec is displayed

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Makefile

read and write complete

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ram.h

read and write complete

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testbench.cpp

miss vec is displayed

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trace.vcd

added rsp map

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