Files
vortex/hw/rtl/interfaces/VX_dcache_response_if.v
2020-04-20 12:51:42 -07:00

13 lines
226 B
Verilog

`ifndef VX_DCACHE_RSP
`define VX_DCACHE_RSP
`include "../VX_define.vh"
interface VX_dcache_response_if ();
wire [`NUM_THREADS-1:0][31:0] in_cache_driver_out_data;
wire delay;
endinterface
`endif