20 lines
364 B
Verilog
20 lines
364 B
Verilog
`ifndef VX_CSR_REQ
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`define VX_CSR_REQ
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`include "../VX_define.vh"
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interface VX_csr_req_if ();
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wire [`NUM_THREADS-1:0] valid;
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wire [`NW_BITS-1:0] warp_num;
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wire [4:0] rd;
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wire [1:0] wb;
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wire [4:0] alu_op;
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wire is_csr;
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wire [11:0] csr_address;
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wire csr_immed;
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wire [31:0] csr_mask;
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endinterface
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`endif |