c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
69 lines
1.7 KiB
Makefile
69 lines
1.7 KiB
Makefile
DESTDIR ?= .
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RTL_DIR = ../../rtl
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DPI_DIR = ../../dpi
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CONFIGS +=
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PARAMS +=
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CXXFLAGS += -std=c++11 -Wall -Wextra -Wfatal-errors -Wno-array-bounds
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CXXFLAGS += -fPIC -Wno-maybe-uninitialized
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CXXFLAGS += -I../../.. -I../../common -I../../../../sim/common
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CXXFLAGS += $(CONFIGS)
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LDFLAGS +=
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DBG_FLAGS += -DDEBUG_LEVEL=$(DEBUG) -DVCD_OUTPUT $(DBG_TRACE_FLAGS)
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RTL_PKGS = $(RTL_DIR)/VX_gpu_pkg.sv $(RTL_DIR)/fpu/VX_fpu_pkg.sv
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RTL_INCLUDE = -I$(RTL_DIR) -I$(DPI_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/mem -I$(RTL_DIR)/cache -I$(RTL_DIR)/fpu -I$(RTL_DIR)/core
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SRCS = main.cpp
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SRCS += $(DPI_DIR)/util_dpi.cpp
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VL_FLAGS = --exe
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VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic
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VL_FLAGS += -Wno-DECLFILENAME -Wno-REDEFMACRO
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VL_FLAGS += --x-initial unique --x-assign unique
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VL_FLAGS += -DSIMULATION
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VL_FLAGS += $(CONFIGS)
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VL_FLAGS += $(PARAMS)
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VL_FLAGS += $(RTL_INCLUDE)
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VL_FLAGS += $(RTL_PKGS)
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# Enable Verilator multithreaded simulation
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THREADS ?= $(shell python -c 'import multiprocessing as mp; print(mp.cpu_count())')
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VL_FLAGS += -j $(THREADS)
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#VL_FLAGS += --threads $(THREADS)
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# Debugigng
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ifdef DEBUG
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VL_FLAGS += --trace --trace-structs $(DBG_FLAGS)
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CXXFLAGS += -g -O0 $(DBG_FLAGS)
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else
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VL_FLAGS += -DNDEBUG
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CXXFLAGS += -O2 -DNDEBUG
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endif
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# Enable perf counters
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ifdef PERF
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VL_FLAGS += -DPERF_ENABLE
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CXXFLAGS += -DPERF_ENABLE
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endif
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PROJECT = top_modules
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all: build
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build: $(SRCS)
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verilator --build $(VL_FLAGS) --cc VX_cache_cluster_top --top-module VX_cache_cluster_top $^ -CFLAGS '$(CXXFLAGS)'
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verilator --build $(VL_FLAGS) --cc VX_cache_top --top-module VX_cache_top $^ -CFLAGS '$(CXXFLAGS)'
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verilator --build $(VL_FLAGS) --cc VX_core_top --top-module VX_core_top $^ -CFLAGS '$(CXXFLAGS)'
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run:
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waves:
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clean:
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rm -rf obj_dir
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