d47cccc157
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
106 lines
2.6 KiB
C++
106 lines
2.6 KiB
C++
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "vl_simulator.h"
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#include "VVX_fifo_queue.h"
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#include <iostream>
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#define MAX_TICKS 20
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#define CHECK(x) \
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do { \
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if (x) \
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break; \
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std::cout << "FAILED: " << #x << std::endl; \
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std::abort(); \
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} while (false)
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uint64_t ticks = 0;
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double sc_time_stamp() {
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return ticks;
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}
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using Device = VVX_fifo_queue;
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int main(int argc, char **argv) {
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// Initialize Verilators variables
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Verilated::commandArgs(argc, argv);
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vl_simulator<Device> sim;
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// run test
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ticks = sim.reset(0);
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while (ticks < MAX_TICKS) {
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switch (ticks) {
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case 0:
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// initial values
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sim->pop = 0;
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sim->push = 0;
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ticks = sim.step(ticks, 2);
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break;
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case 2:
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// Verify outputs
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CHECK(sim->full == 0x0);
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CHECK(sim->empty == 0x1);
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// push 0xa
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sim->pop = 0;
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sim->push = 1;
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sim->data_in = 0xa;
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break;
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case 4:
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// verify outputs
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CHECK(sim->data_out == 0xa);
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CHECK(sim->full == 0x0);
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CHECK(sim->empty == 0x0);
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// push 0xb
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sim->pop = 0;
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sim->push = 1;
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sim->data_in = 0xb;
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break;
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case 6:
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// verify outputs
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CHECK(sim->data_out == 0xa);
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CHECK(sim->full == 0x1);
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CHECK(sim->empty == 0x0);
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// pop
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sim->pop = 1;
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sim->push = 0;
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break;
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case 8:
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// verify outputs
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CHECK(sim->data_out == 0xb);
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CHECK(sim->full == 0x0);
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CHECK(sim->empty == 0x0);
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// pop
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sim->pop = 1;
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sim->push = 0;
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break;
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case 10:
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// verify outputs
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CHECK(sim->full == 0x0);
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CHECK(sim->empty == 0x1);
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sim->pop = 0;
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sim->push = 0;
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break;
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}
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// advance clock
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ticks = sim.step(ticks, 2);
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}
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std::cout << "PASSED!" << std::endl;
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std::cout << "Simulation time: " << std::dec << ticks/2 << " cycles" << std::endl;
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return 0;
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} |