c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
49 lines
2.0 KiB
Systemverilog
49 lines
2.0 KiB
Systemverilog
// Code reused from Intel OPAE's 04_local_memory sample program with changes made to fit Vortex
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// Register all interface signals
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import ccip_if_pkg::*;
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module ccip_interface_reg(
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// CCI-P Clocks and Resets
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input logic pClk, // 400MHz - CC-P clock domain. Primary Clock
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input logic pck_cp2af_softReset_T0, // CCI-P ACTIVE HIGH Soft Reset
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input logic [1:0] pck_cp2af_pwrState_T0, // CCI-P AFU Power State
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input logic pck_cp2af_error_T0, // CCI-P Protocol Error Detected
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// Interface structures
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input t_if_ccip_Rx pck_cp2af_sRx_T0, // CCI-P Rx Port
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input t_if_ccip_Tx pck_af2cp_sTx_T0, // CCI-P Tx Port
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output logic pck_cp2af_softReset_T1,
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output logic [1:0] pck_cp2af_pwrState_T1,
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output logic pck_cp2af_error_T1,
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output t_if_ccip_Rx pck_cp2af_sRx_T1,
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output t_if_ccip_Tx pck_af2cp_sTx_T1
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);
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(* preserve *) logic pck_cp2af_softReset_T0_q;
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(* preserve *) logic [1:0] pck_cp2af_pwrState_T0_q;
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(* preserve *) logic pck_cp2af_error_T0_q;
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(* preserve *) t_if_ccip_Rx pck_cp2af_sRx_T0_q;
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(* preserve *) t_if_ccip_Tx pck_af2cp_sTx_T0_q;
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always@(posedge pClk)
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begin
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pck_cp2af_softReset_T0_q <= pck_cp2af_softReset_T0;
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pck_cp2af_pwrState_T0_q <= pck_cp2af_pwrState_T0;
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pck_cp2af_error_T0_q <= pck_cp2af_error_T0;
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pck_cp2af_sRx_T0_q <= pck_cp2af_sRx_T0;
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pck_af2cp_sTx_T0_q <= pck_af2cp_sTx_T0;
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end
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always_comb
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begin
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pck_cp2af_softReset_T1 = pck_cp2af_softReset_T0_q;
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pck_cp2af_pwrState_T1 = pck_cp2af_pwrState_T0_q;
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pck_cp2af_error_T1 = pck_cp2af_error_T0_q;
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pck_cp2af_sRx_T1 = pck_cp2af_sRx_T0_q;
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pck_af2cp_sTx_T1 = pck_af2cp_sTx_T0_q;
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end
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endmodule
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