24 lines
317 B
Verilog
24 lines
317 B
Verilog
`ifndef VX_FPU_TO_CSR_IF
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`define VX_FPU_TO_CSR_IF
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`include "VX_define.vh"
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`ifndef EXTF_F_ENABLE
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`IGNORE_WARNINGS_BEGIN
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`endif
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interface VX_fpu_to_csr_if ();
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wire valid;
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wire [`NW_BITS-1:0] warp_num;
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wire fflags_NV;
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wire fflags_DZ;
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wire fflags_OF;
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wire fflags_UF;
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wire fflags_NX;
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endinterface
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`endif |