felsabbagh3 a3a3b21de7 Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

..

obj_dir

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

Makefile

better use of valid signal

2019-03-27 00:07:59 -04:00

ram.h

Passing Most tests

2019-03-21 23:47:48 -04:00

results.txt

Passing all tests with 2 threads

2019-03-30 03:54:20 -04:00

test_bench.cpp

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

test_bench.h

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

Vortex.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_alu.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_csr_handler.v

Passing Most tests

2019-03-21 23:47:48 -04:00

VX_d_e_reg.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_decode.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_define.h

Passing all tests with 2 threads

2019-03-30 03:54:20 -04:00

VX_define.v

Passing all tests with 2 threads

2019-03-30 03:54:20 -04:00

VX_e_m_reg.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_execute.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_f_d_reg.v

Added HW threads - Infinite loop + fixed valid

2019-03-27 03:53:59 -04:00

VX_fetch.v

Passing all tests with 2 threads

2019-03-30 03:54:20 -04:00

VX_forwarding.v

Added HW threads - Infinite loop

2019-03-27 03:44:14 -04:00

VX_m_w_reg.v

Added HW threads - Infinite loop + fixed valid

2019-03-27 03:53:59 -04:00

VX_memory.v

Using verilog For-loops + Passing all tests

2019-03-30 22:09:03 -04:00

VX_register_file.v

Passing all tests with 2 threads

2019-03-30 03:54:20 -04:00

VX_writeback.v

Passing all tests with 2 threads

2019-03-30 03:54:20 -04:00