44 lines
983 B
Verilog
44 lines
983 B
Verilog
`ifndef VX_PERF_PIPELINE_IF
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`define VX_PERF_PIPELINE_IF
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`include "VX_define.vh"
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interface VX_perf_pipeline_if ();
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wire [`PERF_CTR_BITS-1:0] ibf_stalls;
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wire [`PERF_CTR_BITS-1:0] scb_stalls;
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wire [`PERF_CTR_BITS-1:0] lsu_stalls;
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wire [`PERF_CTR_BITS-1:0] csr_stalls;
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wire [`PERF_CTR_BITS-1:0] alu_stalls;
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`ifdef EXT_F_ENABLE
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wire [`PERF_CTR_BITS-1:0] fpu_stalls;
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`endif
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wire [`PERF_CTR_BITS-1:0] gpu_stalls;
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modport master (
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output ibf_stalls,
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output scb_stalls,
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output lsu_stalls,
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output csr_stalls,
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output alu_stalls,
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`ifdef EXT_F_ENABLE
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output fpu_stalls,
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`endif
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output gpu_stalls
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);
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modport slave (
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input ibf_stalls,
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input scb_stalls,
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input lsu_stalls,
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input csr_stalls,
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input alu_stalls,
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`ifdef EXT_F_ENABLE
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input fpu_stalls,
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`endif
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input gpu_stalls
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);
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endinterface
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`endif |