21 lines
303 B
Verilog
21 lines
303 B
Verilog
`include "../VX_define.v"
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`ifndef VX_WB_INTER
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`define VX_WB_INTER
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interface VX_wb_inter ();
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wire[`NT_M1:0][31:0] write_data;
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wire[31:0] wb_pc;
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wire[4:0] rd;
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wire[1:0] wb;
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wire[`NT_M1:0] wb_valid;
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wire[`NW_M1:0] wb_warp_num;
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endinterface
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`endif |