Files
vortex/hw/rtl/interfaces/VX_branch_rsp_if.v
2020-07-02 19:44:32 -07:00

15 lines
253 B
Verilog

`ifndef VX_BRANCH_RSP_IF
`define VX_BRANCH_RSP_IF
`include "VX_define.vh"
interface VX_branch_rsp_if ();
wire valid;
wire dir;
wire [31:0] dest;
wire [`NW_BITS-1:0] warp_num;
endinterface
`endif