60 lines
1.6 KiB
Makefile
60 lines
1.6 KiB
Makefile
#CFLAGS += -std=c++11 -O2 -DNDEBUG -Wall -Wextra -Wfatal-errors
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CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -Wfatal-errors
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CFLAGS += -I../../include -I../../../hw/simulate -I../../../runtime
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# control RTL debug print states
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DBG_PRINT = -DDBG_PRINT_CORE_ICACHE \
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-DDBG_PRINT_CORE_DCACHE \
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-DDBG_PRINT_BANK \
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-DDBG_PRINT_DRAM \
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-DDBG_PRINT_SNP_FWD
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#MULTICORE += -DNUM_CLUSTERS=2 -DNUM_CORES=2
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#MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2
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MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2 -DL2_ENABLE=0
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DEBUG = 1
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CFLAGS += -fPIC
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CFLAGS += -DUSE_RTLSIM $(MULTICORE)
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LDFLAGS += -shared -pthread
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# LDFLAGS += -dynamiclib -pthread
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SRCS = vortex.cpp ../common/vx_utils.cpp ../../hw/simulate/simulator.cpp
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RTL_INCLUDE = -I../../hw/rtl -I../../hw/rtl/libs -I../../hw/rtl/interfaces -I../../hw/rtl/pipe_regs -I../../hw/rtl/cache
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VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic $(MULTICORE)
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# Use 64 bytes DRAM blocks
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CFLAGS += -DGLOBAL_BLOCK_SIZE=64
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VL_FLAGS += -DGLOBAL_BLOCK_SIZE=64
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# Enable Verilator multithreaded simulation
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#THREADS ?= $(shell python3 -c 'import multiprocessing as mp; print(max(1, mp.cpu_count() // 2))')
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#VL_FLAGS += --threads $(THREADS)
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# Debugigng
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ifdef DEBUG
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VL_FLAGS += --trace -DVL_DEBUG=1 $(DBG_PRINT)
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CFLAGS += -DVCD_OUTPUT
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else
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CFLAGS += -DNDEBUG
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VL_FLAGS += -DNDEBUG
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endif
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PROJECT = libvortex.so
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# PROJECT = libvortex.dylib
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all: $(PROJECT)
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$(PROJECT): $(SRCS)
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verilator --exe --cc Vortex_Socket.v $(RTL_INCLUDE) $(VL_FLAGS) $(SRCS) -CFLAGS '$(CFLAGS)' -LDFLAGS '$(LDFLAGS)' -o ../$(PROJECT)
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make -j -C obj_dir -f VVortex_Socket.mk
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clean:
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rm -rf $(PROJECT) obj_dir
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