Blaise Tine 7ae770f4eb config update

2020-11-21 12:27:42 -08:00

..

configs

project directories reorganization

2020-04-14 06:35:20 -04:00

models/memory

RTL code refactoring

2020-04-19 03:38:00 -04:00

modelsim

yosys synthesis refactoring

2020-07-10 18:56:41 -04:00

old_rtl

refactoring fixes

2020-04-14 19:39:59 -04:00

opae

L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization

2020-11-21 09:47:56 -08:00

rtl

config update

2020-11-21 12:27:42 -08:00

scripts

L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization

2020-11-21 09:47:56 -08:00

simulate

L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization

2020-11-21 09:47:56 -08:00

syn

minor update

2020-10-20 08:45:21 -07:00

unit_tests

fixed l3cache hang using memory arbiter in afu

2020-11-15 06:36:32 -08:00

.gitignore

adding dram writeenable support + scheduler bug fixes

2020-05-27 19:00:23 -04:00

Makefile

scope refactoring

2020-10-03 18:53:21 -04:00