+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
1 line
84 B
Tcl
1 line
84 B
Tcl
create_clock -name {clk} -period "200 MHz" -waveform { 0.000 1.0 } [get_ports {clk}] |