89 lines
2.8 KiB
Verilog
89 lines
2.8 KiB
Verilog
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`include "VX_define.v"
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module VX_writeback (
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// Mem WB info
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VX_inst_mem_wb_inter VX_mem_wb,
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// EXEC Unit WB info
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VX_inst_exec_wb_inter VX_inst_exec_wb,
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VX_forward_wb_inter VX_fwd_wb,
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// Actual WB to GPR
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VX_wb_inter VX_writeback_inter
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);
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assign VX_fwd_wb.dest = 0;
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assign VX_fwd_wb.wb = 0;
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assign VX_fwd_wb.alu_result = 0;
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assign VX_fwd_wb.mem_data = 0;
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assign VX_fwd_wb.PC_next = 0;
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assign VX_fwd_wb.warp_num = 0;
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wire exec_wb = (VX_inst_exec_wb.wb != 0) && (|VX_inst_exec_wb.wb_valid);
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wire mem_wb = (VX_mem_wb.wb != 0) && (|VX_mem_wb.wb_valid);
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assign VX_writeback_inter.write_data = exec_wb ? VX_inst_exec_wb.alu_result :
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mem_wb ? VX_mem_wb.loaded_data :
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0;
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assign VX_writeback_inter.wb_valid = exec_wb ? VX_inst_exec_wb.wb_valid :
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mem_wb ? VX_mem_wb.wb_valid :
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0;
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assign VX_writeback_inter.rd = exec_wb ? VX_inst_exec_wb.rd :
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mem_wb ? VX_mem_wb.rd :
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0;
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assign VX_writeback_inter.wb = exec_wb ? VX_inst_exec_wb.wb :
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mem_wb ? VX_mem_wb.wb :
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0;
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assign VX_writeback_inter.wb_warp_num = exec_wb ? VX_inst_exec_wb.wb_warp_num :
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mem_wb ? VX_mem_wb.wb_warp_num :
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0;
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// wire[`NT_M1:0][31:0] in_alu_result = VX_mw_wb.alu_result;
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// wire[`NT_M1:0][31:0] in_mem_result = VX_mw_wb.mem_result;
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// wire[4:0] in_rd = VX_mw_wb.rd;
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// wire[1:0] in_wb = VX_mw_wb.wb;
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// wire[31:0] in_PC_next = VX_mw_wb.PC_next;
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// wire[`NT_M1:0] in_valid = VX_mw_wb.valid;
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// wire [`NW_M1:0] in_warp_num = VX_mw_wb.warp_num;
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// wire is_jal;
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// wire uses_alu;
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// wire[`NT_M1:0][31:0] out_pc_data;
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// genvar i;
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// generate
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// for (i = 0; i < `NT; i=i+1)
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// begin
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// assign out_pc_data[i] = in_PC_next;
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// end
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// endgenerate
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// // assign out_pc_data[0] = in_PC_next;
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// // assign out_pc_data[1] = in_PC_next;
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// assign is_jal = in_wb == `WB_JAL;
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// assign uses_alu = in_wb == `WB_ALU;
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// assign VX_writeback_inter.write_data = is_jal ? out_pc_data :
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// uses_alu ? in_alu_result :
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// in_mem_result;
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// assign VX_writeback_inter.wb_valid = in_valid;
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// assign VX_writeback_inter.rd = in_rd;
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// assign VX_writeback_inter.wb = in_wb;
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// assign VX_writeback_inter.wb_warp_num = in_warp_num;
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endmodule // VX_writeback
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