c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
30 lines
979 B
Common Lisp
30 lines
979 B
Common Lisp
/*
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* Copyright 1993-2010 NVIDIA Corporation. All rights reserved.
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*
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* Please refer to the NVIDIA end user license agreement (EULA) associated
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* with this source code for terms and conditions that govern your use of
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* this software. Any use, reproduction, disclosure, or distribution of
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* this software and related documentation outside the terms of the EULA
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* is strictly prohibited.
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*
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*/
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__kernel void DotProduct (__global float* a, __global float* b, __global float* c, int iNumElements)
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{
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// find position in global arrays
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int iGID = get_global_id(0);
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// bound check (equivalent to the limit on a 'for' loop for standard/serial C code
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if (iGID >= iNumElements)
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{
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return;
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}
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// process
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int iInOffset = iGID << 2;
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c[iGID] = a[iInOffset] * b[iInOffset]
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+ a[iInOffset + 1] * b[iInOffset + 1]
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+ a[iInOffset + 2] * b[iInOffset + 2]
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+ a[iInOffset + 3] * b[iInOffset + 3];
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}
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