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42b9d23f832d2192231e66dd55a012193ecdc860
vortex/hw/rtl/core
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Hansung Kim 42b9d23f83 tensor: Write release logic for hgmma 
Upon completion of an op, tensor_core_hopper sends a "ghost" commit
signal down the pipeline with the `wb` and `tensor` bit set in
commit_if.  The scoreboard receives this signal via writeback_if and
resets the inuse_tensor status bit back to zero, which unblocks the
HGMMA_WAIT instruction.
2024-10-11 17:58:44 -07:00
..
generate_ucode.py
i kinda forgot most of changes
2024-05-04 23:01:47 -07:00
VX_alu_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_commit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_core_top.sv
adding tracking for SFU stalls
2023-12-28 12:12:11 -08:00
VX_core.sv
tensor: Add FP16 parameter and expose to VX_core
2024-09-10 15:32:17 -07:00
VX_csr_data.sv
accelerator cisc
2024-05-07 13:58:32 -07:00
VX_csr_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_dcr_data.sv
Vortex 2.0 changes:
2023-11-10 02:47:05 -08:00
VX_decode.sv
tensor: Write stall logic for hgmma_wait
2024-10-11 17:18:01 -07:00
VX_dispatch_unit_sane.sv
Handle BLOCK_SIZE != 1 in dispatch_unit
2024-05-30 23:20:21 -07:00
VX_dispatch_unit.sv
operands optimization
2023-12-20 15:07:23 -08:00
VX_dispatch.sv
Disable trace during the very start of simulation
2024-08-13 16:01:29 -07:00
VX_execute.sv
tensor: Add FP16 parameter and expose to VX_core
2024-09-10 15:32:17 -07:00
VX_fetch.sv
disabling fetch's deadlock check when L1 caches are present
2024-01-31 06:16:54 -08:00
VX_fpu_unit.sv
Handle BLOCK_SIZE != 1 in dispatch_unit
2024-05-30 23:20:21 -07:00
VX_gather_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_ibuffer.sv
tensor: more doc
2024-05-07 13:54:10 -07:00
VX_int_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_ipdom_stack.sv
minor update
2023-11-27 02:04:53 -08:00
VX_issue.sv
Remove duplicate port connection
2024-05-03 15:07:24 -07:00
VX_lsu_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_muldiv_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_operands_dup.sv
sync rf, x0 fix
2024-09-05 16:49:05 -07:00
VX_operands.sv
sync rf, x0 fix
2024-09-05 16:49:05 -07:00
VX_pending_instr.sv
Vortex 2.0 changes:
2023-11-10 02:47:05 -08:00
VX_reduce_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_schedule.sv
Give some slack time for other cores to finish
2024-06-12 09:47:21 -07:00
VX_scoreboard.sv
tensor: Write release logic for hgmma
2024-10-11 17:58:44 -07:00
VX_sfu_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_smem_unit.sv
Doc changes
2024-06-09 13:41:00 -07:00
VX_split_join.sv
Vortex 2.0 changes:
2023-11-10 02:47:05 -08:00
VX_tensor_core.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00
VX_tensor_hopper_core.sv
tensor: Write release logic for hgmma
2024-10-11 17:58:44 -07:00
VX_tensor_ucode_8lanes.vh
tensor: Enable scaling NUM_THREADS by octets
2024-05-16 15:34:50 -07:00
VX_tensor_ucode.txt
store fencing, large smem, fix tensor core for firesim
2024-05-15 21:45:48 -07:00
VX_tensor_ucode.vh
store fencing, large smem, fix tensor core for firesim
2024-05-15 21:45:48 -07:00
VX_trace.vh
- using SV_DPI defines to disable DPI in synthesis-based simulations
2024-01-28 00:22:21 -08:00
VX_uop_sequencer.sv
tensor: Disable micro-ops for hopper
2024-10-11 15:59:31 -07:00
VX_wctl_unit.sv
Add 'tensor' bit to commit_if and writeback_if
2024-10-11 15:42:25 -07:00