88 lines
1.5 KiB
C++
88 lines
1.5 KiB
C++
#pragma once
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#ifdef USE_MULTICORE
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#include "VVortex_SOC.h"
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#else
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#include "VVortex.h"
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#endif
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#include "VVortex__Syms.h"
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#include "verilated.h"
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#ifdef VCD_OUTPUT
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#include <verilated_vcd_c.h>
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#endif
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#include "VX_define.h"
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#include "ram.h"
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#include <fstream>
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#include <vector>
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typedef struct {
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int cycles_left;
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int data_length;
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unsigned base_addr;
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unsigned *data;
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} dram_req_t;
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class Simulator {
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public:
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Simulator(RAM *ram);
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virtual ~Simulator();
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bool is_busy();
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void reset();
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void step();
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void flush_caches(uint32_t mem_addr, uint32_t size);
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bool run();
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protected:
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void print_stats(bool cycle_test = true);
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#ifndef USE_MULTICORE
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bool ibus_driver();
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#endif
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bool dbus_driver();
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void io_handler();
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void send_snoops(uint32_t mem_addr, uint32_t size);
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void wait(uint32_t cycles);
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RAM *ram;
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unsigned start_pc;
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bool refill_d;
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unsigned refill_addr_d;
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bool refill_i;
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unsigned refill_addr_i;
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long int curr_cycle;
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bool stop;
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bool unit_test;
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std::ofstream results;
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int stats_static_inst;
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int stats_dynamic_inst;
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int stats_total_cycles;
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int stats_fwd_stalls;
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int stats_branch_stalls;
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int debug_state;
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int ibus_state;
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int dbus_state;
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int debug_return;
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int debug_wait_num;
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int debug_inst_num;
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int debug_end_wait;
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int debug_debugAddr;
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double stats_sim_time;
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std::vector<dram_req_t> dram_req_vec;
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std::vector<dram_req_t> I_dram_req_vec;
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#ifdef USE_MULTICORE
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VVortex_SOC *vortex;
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#else
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VVortex *vortex;
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#endif
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#ifdef VCD_OUTPUT
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VerilatedVcdC *m_trace;
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#endif
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}; |