Hansung Kim 144521e19c Expose smem ports at VX_core top ...

smem_unit stays inside the core, and the two separate buses to dcache
and smem are exposed at VX_core.

Currently core_wrapper ties req valid to 1'b0, stalling kernels that
reads from sharedmem.

2023-12-31 23:57:31 -08:00

..

afu

Vortex 2.0 changes:

2023-10-19 20:51:22 -07:00

cache

[BUGFIX] Revert way_idx fix

2023-11-28 18:44:47 -08:00

core

Expose smem ports at VX_core top

2023-12-31 23:57:31 -08:00

fpu

Change result type for dpi calls from wire -> reg

2023-11-15 19:26:12 -08:00

interfaces

Vortex 2.0 changes:

2023-10-19 20:51:22 -07:00

libs

[CHANGE] Work around uninitialized signal issue with === operator

2023-11-17 17:20:54 -08:00

mem

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00

.DS_Store

project directories reorganization

2020-04-14 06:35:20 -04:00

Vortex_axi.sv

Vortex 2.0 changes:

2023-10-19 20:51:22 -07:00

Vortex.sv

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00

VX_cluster.sv

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00

VX_config.vh

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00

VX_core_wrapper.sv

Expose smem ports at VX_core top

2023-12-31 23:57:31 -08:00

VX_define.vh

minor update

2023-11-03 08:36:28 -04:00

VX_gpu_pkg.sv

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00

VX_platform.vh

Define SIMULATION for VCS in VX_platform.vh

2023-11-15 19:14:58 -08:00

VX_scope.vh

Vortex 2.0 changes:

2023-10-19 20:51:22 -07:00

VX_socket.sv

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00

VX_types.vh

cache bindings and memory perf refactory

2023-11-03 08:18:18 -04:00