16 lines
224 B
Verilog
16 lines
224 B
Verilog
`ifndef VX_FPU_FROM_CSR_IF
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`define VX_FPU_FROM_CSR_IF
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`include "VX_define.vh"
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interface VX_fpu_from_csr_if ();
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`IGNORE_WARNINGS_BEGIN
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wire [`NUM_WARPS-1:0][`FRM_BITS-1:0] frm;
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`IGNORE_WARNINGS_END
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endinterface
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`endif |