vortex_afu.json

+define+GLOBAL_BLOCK_SIZE=64

+define+NUM_CORES=2

#+define+DBG_PRINT_CORE_ICACHE
#+define+DBG_PRINT_CORE_DCACHE
#+define+DBG_PRINT_CACHE_BANK
#+define+DBG_PRINT_CACHE_SNP
#+define+DBG_PRINT_CACHE_MSRQ
#+define+DBG_PRINT_DRAM
#+define+DBG_PRINT_OPAE

+incdir+.
+incdir+../rtl
+incdir+../rtl/interfaces
+incdir+../rtl/pipe_regs
+incdir+../rtl/cache
+incdir+../rtl/libs

../rtl/VX_user_config.vh
../rtl/VX_config.vh
../rtl/VX_define.vh

../rtl/cache/VX_cache_config.vh
../rtl/cache/VX_cache.v
../rtl/cache/VX_bank.v
../rtl/cache/VX_cache_core_rsp_merge.v
../rtl/cache/VX_cache_core_req_bank_sel.v
../rtl/cache/VX_cache_dram_req_arb.v
../rtl/cache/VX_cache_dfq_queue.v
../rtl/cache/VX_cache_req_queue.v
../rtl/cache/VX_cache_miss_resrv.v
../rtl/cache/VX_fill_invalidator.v
../rtl/cache/VX_snp_rsp_arb.v
../rtl/cache/VX_tag_data_access.v
../rtl/cache/VX_tag_data_structure.v
../rtl/cache/VX_snp_forwarder.v
../rtl/cache/VX_prefetcher.v

../rtl/interfaces/VX_branch_rsp_if.v
../rtl/interfaces/VX_cache_core_req_if.v
../rtl/interfaces/VX_cache_core_rsp_if.v
../rtl/interfaces/VX_cache_dram_req_if.v
../rtl/interfaces/VX_cache_dram_rsp_if.v
../rtl/interfaces/VX_cache_snp_req_if.v
../rtl/interfaces/VX_cache_snp_rsp_if.v
../rtl/interfaces/VX_csr_req_if.v
../rtl/interfaces/VX_exec_unit_req_if.v
../rtl/interfaces/VX_frE_to_bckE_req_if.v
../rtl/interfaces/VX_gpr_data_if.v
../rtl/interfaces/VX_gpr_jal_if.v
../rtl/interfaces/VX_gpr_read_if.v
../rtl/interfaces/VX_gpu_inst_req_if.v
../rtl/interfaces/VX_inst_meta_if.v
../rtl/interfaces/VX_jal_rsp_if.v
../rtl/interfaces/VX_join_if.v
../rtl/interfaces/VX_lsu_req_if.v
../rtl/interfaces/VX_warp_ctl_if.v
../rtl/interfaces/VX_wb_if.v
../rtl/interfaces/VX_wstall_if.v

../rtl/libs/VX_generic_register.v
../rtl/libs/VX_mult.v
../rtl/libs/VX_divide.v
../rtl/libs/VX_generic_stack.v
../rtl/libs/VX_generic_priority_encoder.v
../rtl/libs/VX_priority_encoder.v
../rtl/libs/VX_generic_queue.v
../rtl/libs/VX_countones.v

../rtl/Vortex_Socket.v
../rtl/Vortex_Cluster.v
../rtl/Vortex.v
../rtl/VX_front_end.v
../rtl/VX_back_end.v
../rtl/VX_fetch.v
../rtl/VX_scheduler.v
../rtl/VX_exec_unit.v
../rtl/VX_warp.v
../rtl/VX_icache_stage.v
../rtl/VX_gpr_wrapper.v
../rtl/VX_gpu_inst.v
../rtl/VX_writeback.v
../rtl/VX_csr_pipe.v
../rtl/VX_csr_data.v
../rtl/VX_csr_wrapper.v
../rtl/VX_warp_sched.v
../rtl/VX_gpr.v
../rtl/VX_gpr_ram.v
../rtl/VX_gpr_stage.v
../rtl/VX_dmem_ctrl.v
../rtl/VX_alu_unit.v
../rtl/VX_lsu_unit.v
../rtl/VX_decode.v
../rtl/VX_inst_multiplex.v
../rtl/VX_lsu_addr_gen.v
../rtl/VX_dcache_io_arb.v
../rtl/VX_dram_arb.v

../rtl/pipe_regs/VX_f_d_reg.v
../rtl/pipe_regs/VX_i_d_reg.v
../rtl/pipe_regs/VX_d_e_reg.v

ccip_interface_reg.sv
ccip_std_afu.sv
vortex_afu.sv